參數(shù)資料
型號: XC2S100E-6FTG256C
廠商: Xilinx Inc
文件頁數(shù): 72/108頁
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 100K 256FBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 90
系列: Spartan®-IIE
LAB/CLB數(shù): 600
邏輯元件/單元數(shù): 2700
RAM 位總計: 40960
輸入/輸出數(shù): 182
門數(shù): 100000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FTBGA
其它名稱: 122-1322
66
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E,
XC2S400E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Function
Bank
TMS
-
B1
-
I/O
7
D3
-
I/O, L83P
7
C2
XC2S100E,
150E
-
I/O, L83N
7
C1
XC2S100E,
150E
XC2S200E,
300E, 400E
I/O, L82P_YY
7
D2
All
-
I/O, L82N_YY
7
D1
All
-
I/O, VREF
Bank 7, L81P
7
E3
XC2S50E,
150E, 200E,
300E, 400E
All
I/O, L81N
7
E4
XC2S50E,
150E, 200E,
300E, 400E
-
I/O, L80P
7
E2
XC2S200E,
400E
-
I/O, L80N
7
E1
XC2S200E,
400E
-
I/O, L79P
7
F4
XC2S50E,
300E, 400E
XC2S100E,
150E, 200E,
300E, 400E
I/O, L79N
7
F3
XC2S50E,
300E, 400E
-
I/O, L78P_YY
7
F2
All
-
I/O, L78N_YY
7
F1
All
-
I/O, L77P
7
F5
XC2S100E,
150E
-
I/O, L77N
7
G5
XC2S100E,
150E
-
I/O, L76P_YY
7
G3
All
-
I/O, L76N_YY
7
G4
All
-
I/O, VREF
Bank 7, L75P
7
G2
XC2S50E,
300E, 400E
All
I/O, L75N
7
G1
XC2S50E,
300E, 400E
-
I/O, L74P
7
H4
XC2S100E,
150E, 200E
-
I/O, L74N
7
H3
XC2S100E,
150E, 200E
XC2S400E
I/O, L73P_YY
7
H2
All
-
I/O (IRDY),
L73N_YY
7
H1
All
-
I/O (TRDY)
6
J4
-
I/O, L72P
6
J2
XC2S100E,
150E, 200E,
400E
XC2S400E
I/O, L72N
6
J3
XC2S100E,
150E, 200E,
400E
-
I/O, L71P
6
J1
XC2S50E,
300E, 400E
-
I/O, VREF
Bank 6, L71N
6
K1
XC2S50E,
300E, 400E
All
I/O, L70P_YY
6
K2
All
-
I/O, L70N_YY
6
K3
All
-
I/O, L69P
6
L1
XC2S100E,
150E, 400E
-
I/O, L69N
6
L2
XC2S100E,
150E, 400E
-
I/O, L68P_YY
6
K4
All
-
I/O, L68N_YY
6
K5
All
-
I/O, L67P
6
L3
XC2S50E,
300E, 400E
-
I/O, L67N
6
M2
XC2S50E,
300E, 400E
XC2S100E,
150E, 200E,
300E, 400E
I/O, L66P
6
M1
XC2S150E,
200E, 400E
-
I/O, L66N
6
N1
XC2S150E,
200E, 400E
-
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Function
Bank
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