![](http://datasheet.mmic.net.cn/290000/XA-S3_datasheet_16168671/XA-S3_9.png)
Philips Semiconductors
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
2
C, 2 UARTs, 16 MB address range
Preliminary specification
XA-S3
2000 Dec 01
9
MNEMONIC
NAME AND FUNCTION
TYPE
PIN NUMBER
LQFP
PLCC
P5.0 – P5.7
23–30
17–20,
22–25
I/O
Port 5:
Port 5 is an 8-bit I/O port with a user-configurable output type. Port 5 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of Port 5 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 5 also provides various special functions as described below. Port 5 pins used as A/D
inputs must be configured by the user to the high impedance mode.
AD0 (P5.0):
A/D channel 0 input.
AD1 (P5.1):
A/D channel 1 input.
AD2 (P5.2):
A/D channel 2 input.
AD3 (P5.3):
A/D channel 3 input.
AD4 (P5.4):
A/D channel 4 input.
AD5 (P5.5):
A/D channel 5 input.
AD6/SCL (P5.6):
A/D channel 6 input. I
2
C serial clock input/output.
AD7/SDA (P5.7):
A/D channel 7 input. I
2
C serial data input/output.
23
24
25
26
27
28
29
30
17
18
19
20
22
23
24
25
I
I
I
I
I
I
I/O
I/O
P6.0 – P6.7
43, 44
40, 41
I/O
Port 6:
Port 6 is a 2-bit I/O port with a user-configurable output type. Port 6 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of Port 6 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 6 also provides special functions as described below:
A22 (P6.0):
Address bit 22 of the external address bus.
A23 (P6.1):
Address bit 23 of the external address bus.
43
44
40
41
O
O
Table 1. Special Function Registers
SFR
Address
BIT FUNCTIONS AND ADDRESSES
Reset
Value
NAME
DESCRIPTION
MSB
LSB
3F7
3F6
3F5
3F4
3F3
3F2
3F1
3F0
ADCON#*
A/D control register
43E
–
–
–
–
ADRES
ADMOD
ADSST
ADINT
00h
3FF
3FE
3FD
3FC
3FB
3FA
3F9
3F8
ADCS#*
A/D channel select register
43F
ADCS7
ADCS6
ADCS5
ADCS4
ADCS3
ADCS2
ADCS1
ADCS0
00h
ADCFG#
A/D timing configuration
4B9
–
–
–
–
A/D Timing Configuration
0Fh
ADRSH0#
ADRSH1#
ADRSH2#
ADRSH3#
ADRSH4#
ADRSH5#
ADRSH6#
ADRSH7#
ADRSL#
A/D high byte result, channel 0
A/D high byte result, channel 1
A/D high byte result, channel 2
A/D high byte result, channel 3
A/D high byte result, channel 4
A/D high byte result, channel 5
A/D high byte result, channel 6
A/D high byte result, channel 7
Two LSBs of 10-bit A/D result
4B0
4B1
4B2
4B3
4B4
4B5
4B6
4B7
4B8
xx
xx
xx
xx
xx
xx
xx
xx
xx
BCR#
Bus configuration register
46A
–
–
CLKD
WAITD
BUSD
BC2
BC1
BC0
Note 1
BTRH
Bus timing register high byte
469
DW1
DW0
DWA1
DWA0
DR1
DR0
DRA1
DRA0
FFh
BTRL
Bus timing register low byte
468
WM1
WM0
ALEW
–
CR1
CR0
CRA1
CRA0
EFh
2D7
2D6
2D5
2D4
2D3
2D2
2D1
2D0
CCON#*
PCA counter control
41A
CF
CR
–
CCF4
CCF3
CCF2
CCF1
CCF0
00h
CMOD#
PCA mode control
490
CIDL
WDTE
–
–
–
CPS1
CPS0
ECF
00h
CH#
PCA counter high byte
48B
00h
CL#
PCA counter low byte
48A
00h
CCAPM0#
PCA module 0 mode
491
–
ECOM0
CAPP0
CAPN0
MAT0
TOG0
PWM0
ECCF0
00h
CCAPM1#
PCA module 1 mode
492
–
ECOM1
CAPP1
CAPN1
MAT1
TOG1
PWM1
ECCF1
00h