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參數(shù)資料
| 型號： | XA-S3 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage 2.7 V.5.5 V, I2C, 2 UARTs, 16 MB address range |
| 中文描述： | 的XA 16位微控制器32鉀/ 1畝檢察官辦公室/光盤/無ROM，8通道8位A / D轉(zhuǎn)換，低電壓2.7 V.5.5第五的I2C，2個UART，16 MB的地址范圍 |
| 文件頁數(shù)： | 15/52頁 |
| 文件大?。?/td> | 295K |
| 代理商： | XA-S3 |
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Philips Semiconductors
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
2
C, 2 UARTs, 16 MB address range
Preliminary specification
XA-S3
2000 Dec 01
15
ADCS0
LSB
MSB
BIT
ADCS.7
ADCS.6
ADCS.5
ADCS.4
ADCS.3
ADCS.2
ADCS.1
ADCS.0
SYMBOL
ADCS7
ADCS6
ADCS5
ADCS4
ADCS3
ADCS2
ADCS1
ADCS0
FUNCTION
A/D channel 7 select bit.
A/D channel 6 select bit.
A/D channel 5 select bit.
A/D channel 4 select bit.
A/D channel 3 select bit.
A/D channel 2 select bit.
A/D channel 1 select bit.
A/D channel 0 select bit.
ADCS1
ADCS2
ADCS3
ADCS4
ADCS5
ADCS6
ADCS7
ADCS
Bit Addressable
Reset Value: 00h
Address:43Fh
SU00939
Figure 2. A/D Channel Select Register (ADCS)
LSB
MSB
BIT
ADCFG.7
ADCFG.6
ADCFG.5
ADCFG.4
ADCFG.3–0
SYMBOL
—
—
—
—
ADCFG
FUNCTION
Reserved for future use. Should not be set to 1 by user programs.
Reserved for future use. Should not be set to 1 by user programs.
Reserved for future use. Should not be set to 1 by user programs.
Reserved for future use. Should not be set to 1 by user programs.
A/D timing configuration (see text and table).
A/D Timing Configuration
—
—
—
—
ADCFG
Not bit Addressable
Reset Value: 00h
Address:4B9h
SU00940
Figure 3. A/D Timing Configuration Register (ADCFG)
Table 2. A/D Timing Configuration
ADCFG 3 0
ADCFG.3–0
Max. Oscillator
Frequency (MHz)
Conversion Time
Sampling
(Osc. Clocks)
Osc. Clocks
μ
sec at max. Osc.
0h (0000)
6.66
72
10.81
4
1h (0001)
10
76
7.6
6
2h (0010)
11.11
80
7.2
8
3h (0011)
13.33
96
7.2
8
4h (0100)
16.66
100
6.0
10
5h (0101)
6h (0110)
1
20
104
5.2
12
20
116
5.8
24
7h (0111)
22.2
108
4.86
14
8h (1000)
23.3
124
5.32
14
9h (1001)
26.6
128
4.81
16
Ah (1010)
Bh (1011)
1
30
132
4.4
18
30
146
4.87
32
Ch (1100)
–
136
4.25
20
Dh (1101)
–
152
4.56
20
Eh (1110)
–
172
4.7
22
Fh (1111)
NOTE:
1. These settings provide additional A/D input sampling time, in order to allow accurate readings with a higher external source impedance.
–
176
4.4
24
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