參數(shù)資料
型號: X9520
英文描述: Triple DCP, POR, 2 kbit EEPROM Memory, Dual Voltage Monitors(3個DCP,上電復(fù)位,2k位串行EEPROM,分別的雙電壓監(jiān)控器端電壓-1.0~+15V)
中文描述: 三氯酚,葡萄牙,2千比特EEPROM存儲器,雙電壓監(jiān)視器(3個副處長,上電復(fù)位和2K位串行EEPROM中,分別的雙電壓監(jiān)控器端電壓-1.0?15V的)
文件頁數(shù): 2/34頁
文件大?。?/td> 210K
代理商: X9520
REV 1.3 4/13/04
Characteristics subject to change without notice.
2 of 34
www.xicor.com
X9520
– Preliminary Information
DETAILED DEVICE DESCRIPTION
The X9520 combines three Xicor Digitally Controlled
Potentiometer (DCP) devices, V1 / Vcc power on reset
control, V1 / Vcc low voltage reset control, two supple-
mentary voltage monitors, and integrated EEPROM with
Block Lock protection, in one package. These functions
are suited to the control, support, and monitoring of vari-
ous system parameters in Fiber Channel / Gigabit Ether-
net fiber optic modules, such as in Gigabit Interface
Converter (GBIC) applications. The combination of the
X9520 fucntionality lowers system cost, increases reliabil-
ity, and reduces board space requirements using Xicor’s
unique XBGA packaging.
Two high resolution DCPs allow for the “set-and-forget”
adjustment of Laser Driver IC parameters such as Laser
Diode Bias and Modulation Currents. One lower resolu-
tion DCP may be used for setting sundry system parame-
ters such as maximum laser output power (for eye safety
requirements).
Applying voltage to V
cuit which allows the V1RO output to go HIGH, until the
supply the supply voltage stabilizes for a period of time
(selectable via software). The V1RO output then goes
LOW. The Low Voltage Reset circuitry allows the V1RO
output to go HIGH when V
CC
V
CC
trip point. V1RO remains HIGH until V
proper operating level. A Manual Reset (MR) input allows
the user to externally trigger the V1RO output (HIGH).
CC
activates the Power On Reset cir-
falls below the minimum
CC
returns to
Two supplementary Voltage Monitor circuits continuously
compare their inputs to individual trip voltages. If an input
voltage exceeds it’s associated trip level, a hardware
output (V3RO, V2RO) are allowed to go HIGH. If the input
voltage becomes lower than it’s associated trip level, the
corresponding output is driven LOW. A corresponding
binary representation of the two monitor circuit outputs
(V2RO and V3RO) are also stored in latched, volatile
(CONSTAT) register bits. The status of these two monitor
outputs can be read out via the 2-wire serial port.
An application of the V1RO output may be to drive the
“ENABLE” input of a Laser Driver IC, with MR as a
“TX_DISABLE” input. V2RO and V3RO may be used to
monitor “TX_FAULT” and “RX_LOS” conditions respec-
tively.
Xicor’s unique circuits allow for all internal trip voltages to
be individually programmed with high accuracy. This gives
the designer great flexibility in changing system parame-
ters, either at the time of manufacture, or in the field.
The memory portion of the device is a CMOS serial
EEPROM array with Xicor’s Block Lock
memory may be used to store fiber optic module manu-
facturing data, serial numbers, or various other system
parameters. The EEPROM array is internally organized
as x 8, and utilizes Xicor’s proprietary Direct Write
providing a minimum endurance of 1,000,000 cycles and
a minimum data retention of 100 years.
TM
protection. This
TM
cells,
The device features a 2-Wire interface and software pro-
tocol allowing operation on an I
bus.
2
C compatible serial
PIN CONFIGURATION
V2
R
L0
R
L2
V3
R
H0
R
H1
3
4
5
V1 / Vcc
V1RO
SCL
SDA
R
W0
R
W1
R
L1
7
8
9
V
SS
10
R
H2
R
W2
1
2
18
17
19
20
14
13
12
11
15
16
MR
WP
6
V3RO
V2RO
NOT TO SCALE
2
3
4
A
B
C
D
E
Top View – Bumps Down
1
CSP
20 Pin TSSOP
R
L2
R
W2
R
H2
V2
WP
V3RO
SCL
R
H0
SDA
R
L1
V2RO
V1 / Vcc
V3
V1RO
R
W0
R
L0
R
H1
MR
V
SS
R
W1
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