參數(shù)資料
型號(hào): X9520
英文描述: Triple DCP, POR, 2 kbit EEPROM Memory, Dual Voltage Monitors(3個(gè)DCP,上電復(fù)位,2k位串行EEPROM,分別的雙電壓監(jiān)控器端電壓-1.0~+15V)
中文描述: 三氯酚,葡萄牙,2千比特EEPROM存儲(chǔ)器,雙電壓監(jiān)視器(3個(gè)副處長,上電復(fù)位和2K位串行EEPROM中,分別的雙電壓監(jiān)控器端電壓-1.0?15V的)
文件頁數(shù): 17/34頁
文件大?。?/td> 210K
代理商: X9520
REV 1.3 4/13/04
Characteristics subject to change without notice.
17 of 34
www.xicor.com
X9520
– Preliminary Information
V2 Monitoring
The X9520 asserts the V2RO output HIGH if the volt-
age V2 exceeds the corresponding V
TRIP2
threshold
(See Figure 21). The bit V2OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V2RO output may remain active HIGH with V
CC
down to 1V.
V3 Monitoring
The X9520 asserts the V3RO output HIGH if the volt-
age V3 exceeds the corresponding V
TRIP3
threshold
(See Figure 21). The bit V3OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V3RO output may remain active HIGH with V
CC
down to 1V.
V
TRIPX
THRESHOLDS (X=1,2,3)
The X9520 is shipped with pre-programmed threshold
(V
TRIPx
) voltages. In applications where the required
thresholds are different from the default values, or if a
higher precision / tolerance is required, the X9520 trip
points may be adjusted by the user, using the steps
detailed below.
Setting a V
TRIPx
Voltage (x=1,2,3)
There are two procedures used to set the threshold
voltages (V
TRIPx
), depending if the threshold voltage to
be stored is higher or lower than the present value. For
example, if the present V
TRIPx
is 2.9 V and the new
V
TRIPx
is 3.2 V, the new voltage can be stored directly
into the V
TRIPx
cell. If however, the new setting is to be
lower than the present setting, then it is necessary to
“reset” the V
TRIPx
voltage before setting the new value.
Setting a Higher V
TRIPx
Voltage (x=1,2,3)
To set a V
TRIPx
threshold to a new voltage which is
higher than the present threshold, the user must apply
the desired V
TRIPx
threshold voltage to the corre-
sponding input pin (V1 / Vcc, V2 or V3). Then, a pro-
gramming voltage (Vp) must be applied to the WP pin
before a START condition is set up on SDA. Next, issue
on the SDA pin the Slave Address A0h, followed by the
Byte Address 01h for V
TRIP1
, 09h for V
TRIP2
, and 0Dh
for V
TRIP3
, and a 00h Data Byte in order to program
0 1 2 3 4 5 6 7
SCL
SDA
A0h
0 1 2 3 4 5 6 7
WP
V
P
0 1 2 3 4 5 6 7
V
TRIPx
V2, V3
01h
sets
V
TRIP1
09h
sets
V
TRIP2
0Dh
sets
V
TRIP3
Figure 22. Setting V
TRIPx
to a higher level (x=1,2,3).
Data Byte
V1 / Vcc
00h
S
T
A
R
T
All others Reserved.
Figure 21. Voltage Monitor Response
Vx
VxRO
0V
0V
V
TRIPx
(x = 2,3)
0 Volts
V
TRIP1
V1 / Vcc
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