參數(shù)資料
型號(hào): X1242
英文描述: Real Time Clock/Calendar/Alarms/CPU Supervisor(實(shí)時(shí)時(shí)鐘/日歷/鬧鐘/帶EEPROM的監(jiān)控)
中文描述: 實(shí)時(shí)時(shí)鐘/日歷/報(bào)警/ CPU監(jiān)控(實(shí)時(shí)時(shí)鐘/日歷/鬧鐘/帶EEPROM中的監(jiān)控)
文件頁數(shù): 8/24頁
文件大小: 119K
代理商: X1242
X1242 – Preliminary Information
Characteristics subject to change without notice.
8 of 24
REV 1.1.3 10/15/00
www.xicor.com
To set the new V
TRIP
voltage, apply the desired V
TRIP
threshold voltage to the V
CC
pin and tie the Reset pad
pin to the programming voltage V
P
. Then write data
00h to address 01h. The stop bit following a valid write
operation initiates the V
TRIP
programming sequence.
Bring Reset Pad LOW to complete the operation.
Note:
This operation also writes 00h to address 01h of
the EEPROM array.
Figure 7. Set V
TRIP
Level Sequence (V
CC
= desired V
TRIP
value.)
SCL
SDA
01h
RESET
V
P
= 15V
00h
0
1
2 3
4
5 6
7
0 1
2 3
4
5 6
7
0 1
2 3
4
5 6
7
0 1
2 3
4
5 6
7
AEh
00h
Resetting the V
TRIP
Voltage
This procedure is used to set the V
TRIP
to a “native”
voltage level. For example, if the current V
TRIP
is 4.4V
and the new V
TRIP
must be 4.0V, then the V
TRIP
must
be reset. When V
TRIP
is reset, the new V
TRIP
is some-
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
To reset the new V
TRIP
voltage, apply more than 3V to
the V
CC
pin and tie the Reset Pad pin to the program-
ming voltage V
P
. Then write 00h to address 03h. The
stop bit of a valid write operation initiates the V
TRIP
programming sequence. Bring Reset Pad LOW to
complete the operation.
Note:
This operation also writes 00h to address 03h of
the EEPROM array.
Figure 8. Reset V
TRIP
Level Sequence (V
CC
> V
TRIP
+100mV, V
P
= 15V)
0
1
2 3
4
5 6
7
SCL
SDA
AEh
0 1
2 3
4
5 6
7
03h
RESET
V
P
= 15V
00h
0 1
2 3
4
5 6
7
0 1
2 3
4
5 6
7
00h
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