- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄231500 > WED9LAPC2C16P8BI (MICROSEMI CORP-PMG MICROELECTRONICS) 4M X 32 SYNCHRONOUS DRAM, PBGA153 PDF資料下載
參數(shù)資料
| 型號： | WED9LAPC2C16P8BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 4M X 32 SYNCHRONOUS DRAM, PBGA153 |
| 封裝： | 14 X 22 MM, BGA-153 |
| 文件頁數(shù)： | 17/21頁 |
| 文件大小： | 693K |
| 代理商： | WED9LAPC2C16P8BI |
5
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED9LAPC2B16P8BC
November 2001
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
SDRAM COMMAND TRUTH TABLE
FUNCTION
BRAS or
PRAS
BCAS or
PCAS
BWE or PWE
BDQM or
PDQM
BADDR12,
BADDR13 or
PBS
BADDR or
PADDR
NOTES
Mode Register Set
L
X
OP CODE
Auto Refresh (CBR)
L
H
X
Precharge
Single Bank
L
H
L
X
BA
L
2
Precharge all Banks
L
H
L
X
H
Bank Activate
L
H
X
BA
Row Address
2
Write
H
L
X
BA
L
2
Write with Auto Precharge
H
L
X
BA
H
2
Read
H
L
X
BA
L
2
Read with Auto Precharge
H
L
H
X
BA
H
2
Burst Termination
H
L
X
3
No Operation
H
X
Data Write/Output Disable
X
L
X
4
Data Mask/Output Disable
X
H
X
4
NOTES:
1. All of the SDRAM operations are dened by states of BWE or PWE, BRAS or PRAS, BCAS or PCAS, and BDQM or PDQM at the positive rising edge of the clock.
2. Bank Select (BADDR12, BADDR13, or PBS), if BADDR12, BADDR13, or PBS = 0 then bank A is selected, if BADDR12, BADDR13, or PBS = 1 then bank B is selected.
3. During a Burst Write cycle there is a zero clock delay, for a Burst Read cycle the delay is equal to the CAS latency.
4. The BDQM or PDQM has two functions for the data DQ Read and Write operations. During a Read cycle, when BDQM or PDQM goes high at a clock timing the data outputs
are disabled and become high impedance after a two clock delay. BDQM or PDQM also provides a data mask function for Write cycles. When it activates, the Write operation
at the clock is prohibited (zero clock latency).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WME128K8-200CC | 128K X 8 EEPROM 5V, 200 ns, CDIP32 |
| WMF128K8-60DEQ5 | 128K X 8 FLASH 5V PROM, 60 ns, CDSO32 |
| WMF128K8-70FEC5A | 128K X 8 FLASH 5V PROM, 70 ns, CDFP32 |
| WMF128K8-70FEQ5 | 128K X 8 FLASH 5V PROM, 70 ns, CDFP32 |
| WMS256K16-35FGC | 256K X 16 STANDARD SRAM, 35 ns, CDSO44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WED9LAPC2C16V8BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LAPC2C16V8BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LAPC3C16V8BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LAPC3C16V8BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512K x 32 SSRAM / 1M x 64 SDRAM |
| WED9LC6416V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。