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參數(shù)資料
| 型號(hào)： | WED2DL32512V38BC |
| 元件分類： | SRAM |
| 英文描述： | 512K X 32 MULTI DEVICE SRAM MODULE, 3.8 ns, PBGA119 |
| 封裝： | PLASTIC, BGA-119 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 143K |
| 代理商： | WED2DL32512V38BC |
6
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
WED2DL32512V
SNOOZE MODE
SNOOZE MODE is a low-current, “power-down” mode In which the
device is deselected and current is reduced to ISB2Z. The duration of
SNOOZE MODE is dictated by the length of time ZZ is in a HIGH state.
After the device enters SNOOZE MODE, all inputs except ZZ become
gated inputs and are ignored. ZZ is an asynchronous, active HIGH
Description
Conditions
Symbol
Min
Max
Units
Notes
Current during SNOOZE MODE
ZZ
≥ VIH
ISB2Z
10
mA
ZZ active to input ignored
tZZ
2(tKC)ns
1
ZZ inactive to input sampled
tRZZ
2(tKC)ns
1
ZZ active to snooze current
tZZI
2(tKC)ns
1
ZZ inactive to exit snooze current
tRZZI
ns
1
SNOOZE MODE
input that causes the device to enter SNOOZE MODE. When ZZ
becomes a logic HIGH, ISB2Z is guaranteed after the setup time tZZ is
met. Any READ or WRITE operation pending when the device enters
SNOOZE MODE is not guaranteed to complete successfully. There-
fore, SNOOZE MODE must not be initiated until valid pending
operations are completed.
FIG. 2 SNOOZE MODE TIMING DIAGRAM
ZZ
ISUPPLY
CLOCK
ALL INPUTS
(except ZZ)
Output (Q)
tZZ
tZZI
tRZZ
tRZZI
HIGH-Z
DESELECT or READ Only
IISB2Z
DON'T CARE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WED2DL32512V38BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SYNC SRAM|512KX32|CMOS|BGA|119PIN|PLASTIC |
| WED2DL32512V40BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SYNC SRAM|512KX32|CMOS|BGA|119PIN|PLASTIC |
| WED2DL32512V40BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512Kx32 Synchronous Pipeline Burst SRAM |
| WED2DL32512V-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SSRAM MCP |
| WED2DL32512V-BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TMS320C6202. TMS320C6203. TMS320C6204. TMS320C6 Families |
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