參數(shù)資料
型號(hào): WE512K8300CI
元件分類: PROM
英文描述: 512K X 8 EEPROM 5V MODULE, 300 ns, CDIP32
封裝: SINGLE CAVITY, CERAMIC, DIP-32
文件頁數(shù): 10/13頁
文件大小: 133K
代理商: WE512K8300CI
6
White Microelectronics Phoenix, AZ (602) 437-1520
10
EEPROM
MODULES
WRITE CYCLE TIMING
Figures 6 and 7 show the write cycle timing relationships. A
write cycle begins with address application, write enable and
chip select. Chip select is accomplished by placing the CS line
low. Write enable consists of setting the WE line low. The
write cycle begins when the last of either CS or WE goes low.
The WE line transition from high to low also initiates an
internal 150
sec delay timer to permit page mode operation.
Each subsequent WE transition from high to low that occurs
before the completion of the 150
sec time out will restart the
timer from zero. The operation of the timer is the same as a
retriggerable one-shot.
Write operations are initiated when both CS and WE are low
and OE is high. The EEPROM devices support both a CS and
WE controlled write cycle. The address is latched by the falling
edge of either CS or WE, whichever occurs last.
The data is latched internally by the rising edge of either CS or
WE, whichever occurs first. A byte write operation will
automatically continue to completion.
WE512K8, WE256K8, WE128K8-XCX
WRITE
AC WRITE CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55
°C to +125°C)
Parameter
Symbol
512K x 8
256K x 8
128K x 8
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time, TYP = 6mS
tWC
10
ms
Address Set-up Time
tAS
10
30
ns
Write Pulse Width (WE or CS)
tWP
150
ns
Chip Select Set-up Time
tCS
00
0
ns
Address Hold Time (1)
tAH
125
50
ns
Data Hold Time
tDH
10
0
ns
Chip Select Hold Time
tCH
00
0
ns
Data Set-up Time
tDS
100
ns
Output Enable Set-up Time
tOES
10
30
ns
Output Enable Hold Time
tOEH
10
0
ns
Write Pulse Width High
tWPH
50
ns
NOTES:
1. A17 and A18 must remain valid through WE and CS low pulse, for 512K x 8.
A15, A16, and A17 must remain valid through WE and CS low pulse, for 256K x 8.
A15 and A16 must remain valid through WE and CS low pulse, for 128K x 8.
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