- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄202140 > W949D2CBJX5E (WINBOND ELECTRONICS CORP) 16M X 32 DDR DRAM, 5 ns, PBGA90 PDF資料下載
參數(shù)資料
| 型號： | W949D2CBJX5E |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| 封裝： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 1160K |
| 代理商： | W949D2CBJX5E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
W949D6CB / W949D2CB
512Mb Mobile LPDDR
Publication Release Date: Jun, 14, 2011
- 24 -
Revision A01-006
Notes:
1.
The table applies when both CKEn-1 and CKEn are HIGH, and after tXSR or tXP has been met if the previous state was
Self Refresh or Power Down.
2.
DESELECT and NOP are functionally interchangeable.
3.
All states and sequences not shown are illegal or reserved.
4.
Current State Definitions:
Idle: The bank has been precharged, and tRP has been met.
Row Active: A row in the bank has been activated, and tRCD has been met. No data bursts/accesses and no register
accesses are in progress.
Read: A READ burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Write: A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
5.
Read with AP enabled and Write with AP enabled: The read with Auto Precharge enabled or Write with Auto Precharge
enabled states can be broken into two parts: the access period and the precharge period. For Read with AP, the precharge
period is defined as if the same burst was executed with Auto Precharge disabled and then followed with the earliest
possible PRECHARGE command that still accesses all the data in the burst. For Write with Auto precharge, the precharge
period begins when tWR ends, with tWR measured as if Auto Precharge was disabled. The access period starts with
registration of the command and ends where the precharge period (or tRP) begins. During the precharge period, of the
Read with Auto Precharge enabled or Write with Auto Precharge enabled states, ACTIVE, PRECHARGE, READ, and
WRITE commands to the other bank may be applied; during the access period, only ACTIVE and PRECHARGE
commands to the other banks may be applied. In either case, all other related limitations apply (e.g. contention between
READ data and WRITE data must be avoided).
6.
AUTO REFRESH, SELF REFRESH, and MODE REGISTER SET commands may only be issued when all bank are idle.
7.
A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current state
only.
8.
READs or WRITEs listed in the Command column include READs and WRITEs with Auto Precharge enabled and READs
and WRITEs with Auto Precharge disabled.
9.
Requires appropriate DM masking.
10.
A WRITE command may be applied after the completion of data output, otherwise a BURST TERMINATE command must
be issued to end the READ prior to asserting a WRITE command.
7. OPERATION
7.1. Deselect
The DESELECT function (
CS = high) prevents new commands from being executed by the LPDDR SDRAM. The
LPDDR SDRAM is effectively deselected. Operations already in progress are not affected.
7.2. No Operation
The NO OPERATION (NOP) command is used to perform a NOP to a LPDDR SDRAM that is selected (
CS =Low).
This prevents unwanted commands from being registered during idle or wait states. Operations already in progress
are not affected.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WF128K32N-150HC5 | 512K X 8 FLASH 5V PROM MODULE, 150 ns, HIP66 |
| WPS512K8LB-85GM | 512K X 8 STANDARD SRAM, 85 ns, PDSO32 |
| WPS128K32GV-17PJI | 512K X 8 MULTI DEVICE SRAM MODULE, 17 ns, PQMA68 |
| WF2M32B-150HM5 | 8M X 8 FLASH 5V PROM MODULE, 150 ns, CHIP66 |
| WF2M32B-120G2UC5 | 8M X 8 FLASH 5V PROM MODULE, 120 ns, CQFP68 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W949D2CBJX5ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ |
| W949D2CBJX5I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX5I TR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ, INDUST |
| W949D2CBJX6E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX6ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 166MHZ, 65NM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。