參數(shù)資料
型號(hào): W942508BH
英文描述: DRAM
中文描述: 內(nèi)存
文件頁(yè)數(shù): 26/45頁(yè)
文件大?。?/td> 1601K
代理商: W942508BH
W942508BH
- 26 -
(3) CAS Latency field (A6 to A4)
This field specifies the number of clock cycles from the assertion of the Read command to the
first data read. The minimum values of CAS Latency depends on the frequency of CLK.
A6
A5
A4
CAS LATENCY
Reserved
Reserved
2
Reserved
Reserved
Reserved
2.5
Reserved
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
(4) DLL Reset bit (A8)
This bit is used to reset DLL. When the A8 bit is "1", DLL is reset.
(5) Mode Register /Extended Mode register change bits (BS0, BS1)
These bits are used to select MRS/EMRS.
BS1 BS0
0
0
1
A12-A0
0
1
x
Regular MRS Cycle
Extended MRS Cycle
Reserved
(6) Extended Mode Register field
1) DLL Switch field (A0)
This bit is used to select DLL enable or disable
A0
0
1
DLL
Enable
Disable
2) Output Driver Size Control field (A1)
This bit is used to select Output Driver Size, both Full strength and Half strength are based on
JEDEC standard.
A1
OUTPUT DRIVER
0
Full Strength
1
Half Strength
(7) Reserved field
Test mode entry bit (A7)
This bit is used to enter Test mode and must be set to "0" for normal operation.
Reserved bits (A9, A10, A11, A12)
These bits are reserved for future operations. They must be set to "0" for normal operation.
相關(guān)PDF資料
PDF描述
W942516BH DRAM
W9451GBDA-6 SDRAM|DDR|64MX64|CMOS|DIMM|184PIN|PLASTIC
W981204AH-75 x4 SDRAM
W981204AH-8H x4 SDRAM
W982504AH-7 x4 SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W942508CH 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM
W942508CH-5 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM
W942508CH-6 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM
W942508CH-7 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM
W942508CH-75 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM