- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361795 > W89C840F LAN NODE CONTROLLER PDF資料下載
參數(shù)資料
| 型號(hào)： | W89C840F |
| 英文描述： | LAN NODE CONTROLLER |
| 中文描述： | 網(wǎng)絡(luò)節(jié)點(diǎn)控制器 |
| 文件頁(yè)數(shù)： | 50/72頁(yè) |
| 文件大?。?/td> | 731K |
| 代理商： | W89C840F |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)當(dāng)前第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)
W89C840F
- 50 -
3:0
R/W
EEBRD
[33:0]
EEPROM/Boot ROM Data 0 to 3:
The EEBRD[3:0] are used to store the read/write data for the on-
board boot ROM access when
reset
EESEL low.
When
set
EESEL high,
1) the EEBRD[3] reflects the input data from the BtAdata3/EEDO
pin(connected to EEPROM data output) instantly.
2) the EEBRD[2] stores the output data that will be put on the
BtAdata2/EEDI pin(connected to EEPROM data input) directly.
3) the EEBRD[1] stores t
he output data that w l l be put
on
the BtAdata1/EECK pin (EEPROM serial clock input) directly.
4) the EEBRD[0] stores t
he output data that w l l be put on
the EECS pin(connected to EEPROM chip select) directly.
For accessing the external EEPROM device, the chip select signal,
the serial clock and the data input should follow the AC
specification defined by the external EEPROM device.
C28/CBROA Boot ROM Offset Address Register
The register C28/CBROA specif
i es
the read or write address of the external boot ROM when accessing the
boot ROM through the register C24/CMIIR of the W89C840F
.
Bit
Attribute
Bit name
Description
31:18
R
---
Reserved. Fixed at 0.
17:0
R/W
BROA
Boot ROM Offset Address.
This field contains boot ROM offset address.
C2C/CGTR General Timer Register
The C2C/CGTR shows the real time content of the W89C840F‘s internal general timer
Bit
Attribute
Bit name
Description
31:17
R
---
Reserved. Fixed at 0.
16
R/W
RECUR
Recursive Mode:
If previ ousl y set RECUR hi gh, t
he state of the bit 0 to bit 15
in the register C2C/CGTR will be set to the states programmed by
the driver at the last time when the TIME timer count
down to
zero
.
Default 0.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W89C880F | LAN Hub Controller |
| W89C840F | 100/10Mbps Ethernet Controller(100/10Mbps以太網(wǎng)控制器) |
| W89C92P | 10M CMOS Coaxial Transceiver |
| W89C940F | 10M PCI-Bus Ethernet Network Interface Controller |
| W91040 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
| W89C92 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。