- 您現(xiàn)在的位置：買賣IC網 > PDF目錄361795 > W89C840F LAN NODE CONTROLLER PDF資料下載
參數資料
| 型號： | W89C840F |
| 英文描述： | LAN NODE CONTROLLER |
| 中文描述： | 網絡節(jié)點控制器 |
| 文件頁數： | 38/72頁 |
| 文件大小： | 731K |
| 代理商： | W89C840F |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
W89C840F
- 38 -
C10/CTDLA Transmit Descriptors List Addresses
The register
s C10/CTDLA defi ne
the start address of the transmit descriptor list. It should be updated only
when the transmission DMA state machine is staying at the stop state.
Bit
Attribute
Bit name
Description
31:2
R/W
STL
Start of Transmit List.
1:0
R/W
MBZ
Must be written as 0 for long word alignment.
C14/CISR Interrupt Status Register
Most bits of the C14/CISR report the interrupt status. The assertion of the interrupt status, reported by bits
0, 1, 2, 3, 4, 5, 6, 7, 8, 10, 11 and 13, and the corresponding interrupt mask bits will cause a hardware
interrupt to the host.
A write with 1‘s value the status bit will clear them and write 0 will have no effect.
Bit
Attribute
Bit name
Description
31:26
R
---
Reserved. Fixed at 0.
25:23
R
BET
Bus Error Type.
Th
i s
field indicates the error type of bus error
,
and is valid only
when bit 13, a bus error, is set.
the assertion of these bits does not generate interrupt.
The definition of bus error is as follows.
BET[25:23] Error State
--------------- ------------------
000 Parity Error
001 Master Abort
010 Target Abort
011 Reserved.
1xx Reserved.
The meaning of the error type is described as following.
* Parity Error
--- When W89C840F operates as a bus master, it can detect a data
parity error during a read transaction or sample PERRB asserted on
a write transaction if Parity Error Response bit (F04[6]) is set.
* Master Abort
--- When W89C840F operates as a bus master,
i t
terminates the
read or write transaction with master abort.
* Target Abort
--- When W89C840F operates as a bus master, the read or write
transaction is terminated with target abort.
The initial state of this field after reset is zero.
相關PDF資料 |
PDF描述 |
|---|---|
| W89C880F | LAN Hub Controller |
| W89C840F | 100/10Mbps Ethernet Controller(100/10Mbps以太網控制器) |
| W89C92P | 10M CMOS Coaxial Transceiver |
| W89C940F | 10M PCI-Bus Ethernet Network Interface Controller |
| W91040 | |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
| W89C92 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER |
發(fā)布緊急采購，3分鐘左右您將得到回復。