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參數(shù)資料
| 型號： | W78M32V100BC |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | PROM |
| 英文描述： | 8M X 32 FLASH 3.3V PROM, 100 ns, PBGA159 |
| 封裝： | 13 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-159 |
| 文件頁數(shù)： | 24/54頁 |
| 文件大?。?/td> | 789K |
| 代理商： | W78M32V100BC |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M32V-XBX
April 2006
Rev. 3
White Electronic Designs Corp. reserves the right to change products or specications without notice.
latched. Note that while the Embedded Erase operation is
in progress, the system can read data from the non-erasing
bank. The system can determine the status of the erase
operation by reading DQ7, DQ6, DQ2, or RY/BY# in the
erasing bank. Refer to the Write Operation Status section
for information on these status bits.
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other commands are
ignored. However, note that a hardware reset immediately
terminates the erase operation. If that occurs, the sector
erase command sequence should be reinitiated once that
bank has returned to reading array data, to ensure data
integrity.
Figure 7 illustrates the algorithm for the erase operation.
Refer to the Erase and Program Operations tables in the
AC Characteristics section for parameters, and Figure 17
section for timing diagrams.
ERASE SUSPEND/ERASE RESUME
COMMANDS
The Erase Suspend command, B0h, allows the system to
interrupt a sector erase operation and then read data from,
or program data to, any sector not selected for erasure. The
bank address is required when writing this command. This
command is valid only during the sector erase operation,
including the 80 μs time-out period during the sector erase
command sequence.
The Erase Suspend command is ignored if written during the
chip erase operation or Embedded Program algorithm.
When the Erase Suspend command is written during the
sector erase operation, the device requires a maximum of
20 μs to suspend the erase operation. However, when the
Erase Suspend command is written during the sector erase
time-out, the device immediately terminates the time-out
period and suspends the erase operation. Addresses are
“don’t-cares” when writing the Erase suspend command.
After the erase operation has been suspended, the bank
enters the erase-suspend-read mode. The system can
read data from or program data to any sector not selected
for erasure. (The device “erase suspends” all sectors
selected for erasure.) Reading at any address within
erase-suspended sectors produces status information on
DQ7–DQ0. The system can use DQ7, or DQ6 and DQ2
together, to determine if a sector is actively erasing or is
erase-suspended. Refer to the Write Operation Status
section for information on these status bits.
After an erase-suspended program operation is complete,
the bank returns to the erase-suspend-read mode. The
system can determine the status of the program operation
using the DQ7 or DQ6 status bits, just as in the standard
Word Program operation. Refer to the Write Operation
Status section for more information.
In the erase-suspend-read mode, the system can also issue
the autoselect command sequence. The device allows
reading autoselect codes even at addresses within erasing
sectors, since the codes are not stored in the memory array.
When the device exits the autoselect mode, the device
reverts to the Erase Suspend mode, and is ready for another
valid operation. Refer to the Autoselect Mode andAutoselect
Command Sequence sections for details.
To resume the sector erase operation, the system must write
the Erase Resume command (address bits are don’t care).
The bank address of the erase-suspended bank is required
when writing this command. Further writes of the Resume
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh?
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
Notes:
1. See Table 13 for erase command sequence.
2. See the section on DQ3 for information on the sector erase timer.
FIGURE 7. ERASE OPERATION
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| W78M32V120BM | 8M X 32 FLASH 3.3V PROM, 120 ns, PBGA159 |
| W78M32V90BM | 8M X 32 FLASH 3.3V PROM, 90 ns, PBGA159 |
| W78M32V70BC | 8M X 32 FLASH 3.3V PROM, 70 ns, PBGA159 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W78M32V100BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V100BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V120BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V120BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V120BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
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