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參數(shù)資料
| 型號： | W26L11H-70LL |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 16 STANDARD SRAM, 70 ns, PDSO44 |
| 封裝： | TSOP2-44 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 134K |
| 代理商： | W26L11H-70LL |
Preliminary W26L11
Publication Release Date: October 1999
- 5 -
Revision A1
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled, CS = OE = UB = LB = VIL, WE = VIH)
Address
T
D
OH
AA
RC
OH
OUT
Read Cycle 2
(Chip Select Controlled, OE = VIL, WE = VIH)
Address
RC
T
TACS
T
CS
CHZ
T
CLZ
D
TBLZ
OUT
UB / LB
TBHZ
T
OE
OHZ
TOLZ
TBA
TOE
HIGH-Z
Notes:
1. WE is high for read cycle.
2. Device is continuously selected.
CS = OE = LB = Low
3. Address valid prior to or coincident with CS transition low.
Timing Waveforms, continued
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