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參數(shù)資料
| 型號： | W26L11H-70LL |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 16 STANDARD SRAM, 70 ns, PDSO44 |
| 封裝： | TSOP2-44 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 134K |
| 代理商： | W26L11H-70LL |
Preliminary W26L11
- 4 -
AC Characteristics, continued
(VDD = 2.7~3.6V; VSS = 0V; TA (
°C) = 0 to 70)
(1) Read Cycle
PARAMETER
SYM.
W26L11-70
UNIT
MIN.
MAX.
Read Cycle Time
TRC
70
-
nS
Address Access Time
TAA
70
nS
Chip Select Access Time
TACS
70
nS
Output Enable to Output Valid
TOE
35
nS
UB , LB Access Time
TBA
35
nS
Output Hold from Address Change
TOH
3
nS
Chip Select to Output in Low Z
TCLZ*
10
nS
Chip Disable to Output in High Z
TCHZ*
0
25
nS
Output Enable to Output in Low Z
TOLZ*
5
nS
Output Disable to Output in High Z
TOHZ*
0
25
nS
UB , LB Select to Output in Low Z
TBLZ*
10
nS
UB , LB Deselect to Output in High Z
TBHZ*
0
15
nS
These parameters are sampled but not 100% tested.
(2) Write Cycle
PARAMETER
SYM.
W26L11-70
UNIT
MIN.
MAX.
Write Cycle Time
TWC
70
nS
Chip Select to End of Write
TCW
60
nS
Address Valid to End of Write
TAW
60
nS
Address Setup Time
TAS
0
nS
UB , LB Select to End of Write
TBW
30
nS
Write Pulse Width
TWP
50
nS
Write Recovery Time
CS , WE
TWR
0
nS
Data Valid to End of Write
TDW
30
nS
Data Hold from End of Write
TDH
0
nS
Write to Output in High Z
TWHZ*
0
25
nS
Write to Output in Low Z
TWLZ*
5
-
nS
These parameters are sampled but not 100% tested.
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