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參數(shù)資料
| 型號： | W25Q80VZPI |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 1M X 8 SPI BUS SERIAL EEPROM, DSO8 |
| 封裝： | 6 X 5 MM, WSON-8 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 1276K |
| 代理商： | W25Q80VZPI |
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W25Q80, W25Q16, W25Q32
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10.2.8 Read Data (03h)
The Read Data instruction allows one more data bytes to be sequentially read from the memory. The
instruction is initiated by driving the /CS pin low and then shifting the instruction code “03h” followed by
a 24-bit address (A23-A0) into the DI pin. The code and address bits are latched on the rising edge of
the CLK pin. After the address is received, the data byte of the addressed memory location will be
shifted out on the DO pin at the falling edge of CLK with most significant bit (MSB) first. The address is
automatically incremented to the next higher address after each byte of data is shifted out allowing for a
continuous stream of data. This means that the entire memory can be accessed with a single instruction
as long as the clock continues. The instruction is completed by driving /CS high. The Read Data
instruction sequence is shown in figure 8. If a Read Data instruction is issued while an Erase, Program
or Write cycle is in process (BUSY=1) the instruction is ignored and will not have any effects on the
current cycle. The Read Data instruction allows clock rates from D.C. to a maximum of fR (see AC
Electrical Characteristics).
Figure 8. Read Data Instruction Sequence Diagram
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| W25S243A | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
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