參數(shù)資料
型號(hào)： W25Q80BVDAAG
廠商： WINBOND ELECTRONICS CORP
元件分類(lèi)： PROM
英文描述： 8M X 1 SPI BUS SERIAL EEPROM, PDIP8
封裝： 0.300 INCH, GREEN, PLASTIC, DIP-8
文件頁(yè)數(shù)： 18/75頁(yè)
文件大小： 1055K
代理商： W25Q80BVDAAG
W25Q80BV
Publication Release Date: October 06, 2010
- 25 -
Revision D
1
9.2.10
Read Data (03h)
The Read Data instruction allows one or more data bytes to be sequentially read from the memory. The
instruction is initiated by driving the /CS pin low and then shifting the instruction code “03h” followed by
a 24-bit address (A23-A0) into the DI pin. The code and address bits are latched on the rising edge of the
CLK pin. After the address is received, the data byte of the addressed memory location will be shifted out
on the DO pin at the falling edge of CLK with most significant bit (MSB) first. The address is automatically
incremented to the next higher address after each byte of data is shifted out allowing for a continuous
stream of data. This means that the entire memory can be accessed with a single instruction as long as
the clock continues. The instruction is completed by driving /CS high.
The Read Data instruction sequence is shown in figure 9. If a Read Data instruction is issued while an
Erase, Program or Write cycle is in process (BUSY=1) the instruction is ignored and will not have any
effects on the current cycle. The Read Data instruction allows clock rates from D.C. to a maximum of fR
(see AC Electrical Characteristics).
/CS
CLK
DI
(IO
0)
DO
(IO )
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (03h)
High Impedance
8
9
10
28
29
30
31
32
33
34
35
36
37
38
39
7
6
5
4
3
2
1
0
7
24-Bit Address
23
22
21
3
2
1
0
Data Out 1
*
= MSB
*
Figure 9. Read Data Instruction Sequence Diagram
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