參數(shù)資料
型號(hào): W25Q128BVEIP
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 128M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝: 8 X 6 MM, GREEN, WSON-8
文件頁(yè)數(shù): 16/74頁(yè)
文件大小: 855K
代理商: W25Q128BVEIP
W25Q128BV
Publication Release Date: April 01, 2011
- 23 -
Revision E
(IO
1)
7.2.7 Write Disable (04h)
The Write Disable instruction (Figure 6) resets the Write Enable Latch (WEL) bit in the Status Register to
a 0. The Write Disable instruction is entered by driving /CS low, shifting the instruction code “04h” into the
DI pin and then driving /CS high. Note that the WEL bit is automatically reset after Power-up and upon
completion of the Write Status Register, Erase/Program Security Registers, Page Program, Quad Page
Program, Sector Erase, Block Erase and Chip Erase instructions.
Write Disable instruction can also be used to invalidate the Write Enable for Volatile Status Register
instruction.
/CS
CLK
DI
(IO
0)
DO
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Mode 0
Mode 3
Instruction (04h)
High Impedance
Figure 6. Write Disable Instruction Sequence Diagram
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