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參數(shù)資料
| 型號： | VSP2000 |
| 英文描述： | CCD SIGNAL PROCESSOR FOR DIGITAL CAMERAS |
| 中文描述： | CCD信號處理器的數(shù)碼相機 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 291K |
| 代理商： | VSP2000 |
VSP2000
9
BLACK LEVEL AUTO-ZERO LOOP
The black level auto-zero loop amplifies the difference
between the output of the output amplifier and a reference
signal during the dummy pixel interval. This difference
signal is amplified and fed back into the output amplifier to
correct the offset. In doing so, the output level of the entire
CCD channel can be controlled to be approximately –FS +
32LSBs under zero signal conditions. The black level auto-
zero loop is activated by the OB timing signal.
Figure 5 shows a block diagram of the black level auto-zero
loop. The loop time constant is given by:
A/D CONVERTER
The A/D converter utilizes a pipline architecture. The fully
differential topology and digital error correction guarantee
10-bit resolution. The A/D converter circuitry includes a
reference circuit that provides bias voltages for the entire
system.
DECOUPLING AND GROUNDING
CONSIDERATIONS
The VSP2000 has several supply pins, one of which is
dedicated to supply only the digital output driver (pin 17,
DV
DD1
). The remaining supply pins are not, as is often the
case, divided into analog and digital supply pins since they
are internally connected on the chip. For this reason, it is
recommended that the VSP2000 be treated as an analog
component and to power if from the analog supply only.
Digital supply lines often carry high levels of wide band
noise which can couple back into the VSP2000 and limit
performance.
Figure 6 shows the recommended decoupling scheme for the
VSP2000. In most cases, 0.1
μ
F ceramic chip capacitors are
adequate to keep the impedance low over a wide frequency
range. Their effectiveness largely depends on the proximity
to the individual pin. Therefore, they should be located as
close as possible to the pins. In addition, one larger capacitor
(1
μ
F to 22
μ
F) should be placed on the PC board in proxim-
ity of the VSP2000.
DEMONSTRATION BOARD
A demonstration board, DEM-VSP2000, is available to
assist in the inital evaluation of the circuit performance
using the VSP2000. The schematic and board layout of the
DEM-VSP2000 are shown in Figure 6 and Figures 7a
through 7d, respectively.
T =
C
(G
M
) (D)
where C is the external filter capacitance applied to pin 24
(C), G
M
is .001
and D is the duty cycle of the time that the
black level auto-zero loop is in operation. The duty cycle (D)
must be considered as the loop operates in a sampled mode.
Operation of the black level auto-zero loop is activated by
the OB signal that happens once during each horizontal line
interval.
OB
To ADS
32LSB
Error
Amplifier
G
M
From
VCA
C
C
FIGURE 5. Black Level Auto-Zero Loop.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VSP2000Y | 制造商:Rochester Electronics LLC 功能描述:CCD SIGNAL PROCESSOR - Bulk |
| VSP2050 | 功能描述:臺式電源 20V 50A HIGH POWER SWITCHING WITH RS232 RoHS:否 制造商:B&K Precision 類型:DC Electronic Loads (Programmable) 輸入電壓:110 VAC, 220 VAC Selectable 輸出端數(shù)量: 輸出電壓（通道 1）:0.1 V to 120 V 輸出電流（通道 1）:30 A 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 顯示器類型:VFD |
| VSP2050GPIB | 功能描述:臺式電源 20V 50A HIGH POWER SWITCHING WITH GPIB RoHS:否 制造商:B&K Precision 類型:DC Electronic Loads (Programmable) 輸入電壓:110 VAC, 220 VAC Selectable 輸出端數(shù)量: 輸出電壓（通道 1）:0.1 V to 120 V 輸出電流（通道 1）:30 A 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 顯示器類型:VFD |
| VSP2050-REFURB | 制造商:B&K Precision Corporation 功能描述:POWER SUPPLY, BENCH, 20V, 1.2KW; Power Supply Output Type:Adjustable; No. of Outputs:1; Power Rating:1.2kW; Input Voltage:95VAC to 264VAC; Height:44.5mm; Length:457mm; Load Regulation:0.1%; Output Current:50A; Output Voltage:20VDC ;RoHS Compliant: NA |
| VSP2080 | 制造商:BB 制造商全稱:BB 功能描述:CCD SIGNAL FRONT-END PROCESSOR FOR DIGITAL CAMERAS |
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