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參數(shù)資料
| 型號： | VSP2000 |
| 英文描述： | CCD SIGNAL PROCESSOR FOR DIGITAL CAMERAS |
| 中文描述： | CCD信號處理器的數(shù)碼相機 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 291K |
| 代理商： | VSP2000 |
VSP2000
8
DIFFERENCE AMPLIFIER
The correlated double sampler function is completed when
the output of the data and reference channel are sent to the
difference amplifier where the signals are subtracted. In
addition to providing the difference function, the difference
amplifier amplifies the signal by a factor of 2 which helps
to improve the overall signal-to-noise ratio. The difference
amplifier also generates a differential signal to drive the
voltage-controlled attenuator.
INPUT CLAMP
The output from the CCD array is capacitively coupled to the
VSP2000. To prevent shifts in the DC level from taking place
due to varying input duty cycles, the input capacitor is
clamped during the dummy pixel interval by the REFCK
signal. A P-channel transistor is used for this input clamp
switch to be able to allow a 2V negative change at the input
that would bring the signal below ground by 1. Under typical
conditions, the bias at the input to the VSP2000 is at 1V.
DUMMY PIXEL AUTO-ZERO LOOP
The output from the data and reference channel is processed
by the previously mentioned difference amplifier. The dif-
ferential output from the difference amplifier is sent to both
the voltage-controlled logarithmic attenuator and to an error
amplifier. The error amplifier amplifies and feeds a signal to
the difference amplifier to drive the offset measured at the
output of the difference amplifier to zero. A block diagram
of this circuit is shown in Figure 3. This error amplifier
serves the purpose of reducing the offset of the CDS to avoid
a large offset from being amplified by the output amplifier.
The effective time constant of this loop is given by:
where R is 10k
, C is an external capacitor connected to pin
27 (CCD R), A is the gain of the error amplifier with a value
of 50, and D is the duty cycle of the time that the dummy pixel
auto-zero loop is in operation. The duty cycle (D) must be
considered as the loop operates in a sampled mode. Operation
of the dummy auto-zero loop is activated by the DUMC
signal that happens once during each horizontal line interval.
TIMING
The REFCK and DATCK signals are used to operate the
CDS as previously explained. These same two signals are
also used by internal timing circuitry to create the necessary
timing signals for the A/D. The output from the A/D is read
out to external circuitry by the ADCK signal. DUMC is used
to activate the dummy pixel auto-zero loop and OB is used
to activate the black level auto-zero loop. The input digital
timing signals REFCK, DATCK, DUMC and OB are ca-
pable of being driven from either 3V or 5V logic levels.
VOLTAGE-CONTROLLED ATTENUATOR
To maximize the dynamic range of the VSP2000, a voltage-
controlled attenuator is included with a control range from
0dB to –34dB. The gain control has a logarithmic relation-
ship between the control voltage and the attenuation. The
attenuator processes a differential signal from the difference
amplifier to improve linearity and to reject both power
supply and common-mode noise. The output from the at-
tenuator is amplified by 28dB prior to being applied to the
A/D. A typical gain control characteristic of the VSP2000 is
shown in the typical performance curve, “VCA Characteris-
tics”. AGC1 is a coarse gain control and AGC2 is a fine gain
control. Figure 4 shows how the gain control signals are
applied.
RC
AD
T =
1k
16k
AGC1
AGC2
To Internal
Gain Control
Circuits
FIGURE 4. Gain Control Resistors.
FIGURE 3. Block Diagram of Dummy Pixel Loop.
DUMCK
To VCA
CDS
Error
Amplifier
A
CCD
Input
CCD R
C
R
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| VSP2101 | CCD SIGNAL PROCESSOR For Digital Cameras |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VSP2000Y | 制造商:Rochester Electronics LLC 功能描述:CCD SIGNAL PROCESSOR - Bulk |
| VSP2050 | 功能描述:臺式電源 20V 50A HIGH POWER SWITCHING WITH RS232 RoHS:否 制造商:B&K Precision 類型:DC Electronic Loads (Programmable) 輸入電壓:110 VAC, 220 VAC Selectable 輸出端數(shù)量: 輸出電壓（通道 1）:0.1 V to 120 V 輸出電流（通道 1）:30 A 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 顯示器類型:VFD |
| VSP2050GPIB | 功能描述:臺式電源 20V 50A HIGH POWER SWITCHING WITH GPIB RoHS:否 制造商:B&K Precision 類型:DC Electronic Loads (Programmable) 輸入電壓:110 VAC, 220 VAC Selectable 輸出端數(shù)量: 輸出電壓（通道 1）:0.1 V to 120 V 輸出電流（通道 1）:30 A 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 顯示器類型:VFD |
| VSP2050-REFURB | 制造商:B&K Precision Corporation 功能描述:POWER SUPPLY, BENCH, 20V, 1.2KW; Power Supply Output Type:Adjustable; No. of Outputs:1; Power Rating:1.2kW; Input Voltage:95VAC to 264VAC; Height:44.5mm; Length:457mm; Load Regulation:0.1%; Output Current:50A; Output Voltage:20VDC ;RoHS Compliant: NA |
| VSP2080 | 制造商:BB 制造商全稱:BB 功能描述:CCD SIGNAL FRONT-END PROCESSOR FOR DIGITAL CAMERAS |
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