參數(shù)資料
型號： MCIMX258CVM4
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝： 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù)： 20/154頁
文件大小： 1498K
代理商： MCIMX258CVM4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
116
Freescale Semiconductor
3.7.19.1.2
UART Receive Timing in RS-232 Serial Mode
Figure 86 shows the UART receive timing in RS-232 serial mode, showing only 8 data bits and 1 stop bit.
Table 87 describes the timing parameter (UA2) shown in the figure.
–
Figure 86. UART RS-232 Serial Mode Receive Timing Diagram
3.7.19.2
UART Infrared (IrDA) Mode Timing
The following subsections describe the UART transmit and receive timing in IrDA mode.
3.7.19.2.3
UART IrDA Mode Transmit Timing
Figure 87 depicts the UART transmit timing in IrDA mode, showing only 8 data bits and 1 stop bit.
Table 88 describes the timing parameters (UA3–UA4) shown in the figure.
Figure 87. UART IrDA Mode Transmit Timing Diagram
Table 86. UART RS-232 Serial Mode Transmit Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA1
Transmit Bit Time
tTbit
1/Fbaud_rate
1 – T
ref_clk
2
1 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
2 T
ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).
1/Fbaud_rate + Tref_clk
—
Table 87. UART RS-232 Serial Mode Receive Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA2
Receive bit time1
1 Note: The UART receiver can tolerate 1/(16
× F
baud_rate) tolerance in each bit. But accumulation tolerance in one frame must
not exceed 3/(16
× F
baud_rate).
tRbit
1/Fbaud_rate
2 – 1/(16
× F
baud_rate)
2 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
1/Fbaud_rate + 1/(16
× F
baud_rate)
—
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
RXD
(input)
Bit 3
Start
Bit
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA2
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
TXD
(output)
Bit 3
Start
Bit
STOP
BIT
Possible
Parity
Bit
UA3
UA4
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