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參數(shù)資料
| 型號(hào)： | V63C31364097 |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 128K X 36 CMOS Synchronous Burst Flow-Through SRAM(128Kx36CMOS同步脈沖流經(jīng)過的SRAM) |
| 中文描述： | 128K的米鼠36的CMOS同步突發(fā)流量通過的SRAM（128Kx36CMOS同步脈沖流經(jīng)過的靜態(tài)存儲(chǔ)器） |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 73K |
| 代理商： | V63C31364097 |
MOSEL V ITELIC
V63C31364097
5
V63C31364097 Rev. 0.4 February 1999
Absolute Maximum Ratings (See Note 1)
Notes:
1.
Permanant device demage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded Functional operation
should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher then recommended volt-
ages for extended periods of time could affect device reliability
2.
Power dissipation capability is dependent upon package characteristics and use environment. See Package Ther-
mal Characteristics
3.
This is a steady-state DC parameter that is in effect after the power supply has achieved its nominal operating level.
Power sequencing cannot be controlled, and is not allowed.
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; how-
ever, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated
voltages to this high-impedance circuit.
Capacitances
(If = 1.0 Mhz, T
A
= 25
°
C, V
DD
= 3.3V)
This parameter is guaranteed by device Characterization and not Production tested.
Rating
Symbol
Value
Unit
Power Supply Voltage
V
DDQ
V
SS
- 0.5 to + 4.6
V
I/O Supply Voltage (See Note 3)
V
DDQ
V
SS
- 0.5 to V
DD
V
Input Voltage Relative to VSS for Any
Pin Except VDD (See Note 3)
V
in
, V
out
V
SS
V
DD
- 0.5 to
+ 0.5
V
Input Voltage (Three-State l/O) (See Note 3)
V
IT
V
V
SS
- 0.5 to
+ 0.5
DDQ
V
Output Current (per I/O)
I
out
±
20
mA
Package Power Dissipation (See Note 2)
P
D
1 6
W
Temperature Under Bias
T
bias
-10 to 85
°
C
Storage Temperature
T
stg
-55 to 125
°
C
Parameters
Symbol
Min
Typ
Max
Unit
Input Capacitance
C
in
–
4
5
pF
Input/Output Capacitance
C
I/O
-
7
8
pF
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