參數(shù)資料
型號： V59C1512168QALP25E
廠商： PROMOS TECHNOLOGIES INC
元件分類： DRAM
英文描述： 32M X 16 DDR DRAM, BGA92
封裝： GREEN, FBGA-92
文件頁數(shù)： 8/79頁
文件大?。?/td> 1028K
代理商： V59C1512168QALP25E
16
V59C1G01(408/808/168)QA Rev. 1.3 June 2008
ProMOS TECHNOLOGIES
V59C1G01(408/808/168)QA
Off- Chip-Driver Adjust Program
4 bit burst code inputs to all DQs
Operation
DT0
DT1
DT2
DT3
Pull-up driver strength
Pull-down driver strength
00
0
NOP (no operation)
00
0
1
Increase by 1 step
NOP
00
1
0
Decrease by 1 step
NOP
01
0
NOP
Increase by 1 step
10
0
NOP
Decrease by 1 step
01
0
1
Increase by 1 step
01
1
0
Decrease by 1 step
Increase by 1 step
10
0
1
Increase by 1 step
Decrease by 1 step
10
1
0
Decrease by 1 step
Other Combinations
Reserved
For proper operation of adjust mode, WL = RL - 1 = AL + CL -1 clocks and tDS / tDH should be met as the fol-
lowing timing diagram. Input data pattern for adjustment, DT0 - DT3 is fixed and not affected by MRS
addressing mode (i.e. sequential or interleave). Burst length of 4 have to be programmed in the MRS for OCD
impedance adjustment.
NOP
EMRS
CMD
CK
DQS_in
DQ_in
tDS tDH
WL
OCD adj ust mode
OCD calibratio n mode exit
tWR
EMRS
CK
DQS
NOP
DT0
DT1
DT2
DT3
相關(guān)PDF資料
PDF描述
V59C1512168QAUF37I 32M X 16 DDR DRAM, PBGA92
V59C1512168QAUJ19H 32M X 16 DDR DRAM, PBGA92
V59C1512168QAUJ25 32M X 16 DDR DRAM, PBGA92
V59C1G01408QAUP5E 256M X 4 DDR DRAM, BGA68
V59C1G01804QALF19 128M X 8 DDR DRAM, PBGA68
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
V5A010CB 制造商:Honeywell Sensing and Control 功能描述:MICROSWITCH V5 PIN PLUNGER
V5A010CB 制造商:Honeywell Sensing and Control 功能描述:MICROSWITCH V5 PIN PLUNGER
V5A010CB4D 制造商:Honeywell Sensing and Control 功能描述:MICROSWITCH V5 ROLLER LEVER
V5A010CB4D 制造商:Honeywell Sensing and Control 功能描述:MICROSWITCH V5 ROLLER LEVER
V5A010CB4E 制造商:Honeywell Sensing and Control 功能描述:MICROSWITCH V5 ROLLER LEVER
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*