參數(shù)資料
型號(hào)： V54C365164VCT8PC
廠商： MOSEL-VITELIC
元件分類： DRAM
英文描述： 4M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝： 0.400 INCH, PLASTIC, TSOP2-54
文件頁(yè)數(shù)： 6/54頁(yè)
文件大?。?/td> 1570K
代理商： V54C365164VCT8PC
14
V54C365164VC Rev. 0.8 July 2001
MOSEL VITELIC
V54C365164VC
Notes for AC Parameters:
1.
For proper power-up see the operation section of this data sheet.
2.
AC timing tests have VIL = 0.8V and VIH = 2.0V with the timing referenced to the 1.4 V crossover point. The transition
time is measured between VIH and VIL. All AC measurements assume tT = 1ns with the AC output load circuit
shown in Figure 1.
4.
If clock rising time is longer than 1 ns, a time (tT/2 – 0.5) ns has to be added to this parameter.
5.
If tT is longer than 1 ns, a time (tT – 1) ns has to be added to this parameter.
6.
These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as
follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command
is registered.
7.
Referenced to the time which the output achieves the open circuit condition, not to output voltage levels
1.4V
tCS
tCH
tAC
tLZ
tOH
tHZ
CLK
COMMAND
OUTPUT
50 pF
I/O
Z=50 Ohm
+ 1.4 V
50 Ohm
VIH
VIL
tT
Figure 1.
tCK
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參數(shù)描述
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