參數(shù)資料
型號(hào): UT80C196KD-WCC
英文描述: MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC
中文描述: 單片機(jī)| 16位| 8096的CPU |的CMOS | QFL | 68PIN |塑料
文件頁數(shù): 5/42頁
文件大?。?/td> 190K
代理商: UT80C196KD-WCC
5
Notes:
1.
The Unimplemented Opcode and Software Trap interrupts are not prioritized. The Interrupt Controller immediately services these interrupts when they are
asserted. NMI has the highest priority of all prioritized interrupts. Any PTS interrupt has priority over lower priority intterupts, and over all other maskable
interrupts. The standard maskable interrupts are serviced according to their priority number with INT0 has the lowest priority of all interrupts.
These interrupts can be configured to function as independant, external interrupts.
If the Serial interrupt is masked and the Receive and Transmit interrupts are enabled, the RI flag and TI flag generate separate Receive and Transmit inter-
rupts.
If the Receive and Transmit interrupts are masked and the Serial interrupt is enabled, both RI flag and TI flag generate a Serial Port interrupt.
2.
3.
4.
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