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參數(shù)資料
| 型號： | UT80C196KD-WCA |
| 英文描述： | MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC |
| 中文描述： | 單片機| 16位| 8096的CPU |的CMOS | QFL | 68PIN |塑料 |
| 文件頁數(shù)： | 19/42頁 |
| 文件大?。?/td> | 190K |
| 代理商： | UT80C196KD-WCA |
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19
34
TDO
HSO.2
---
High Speed Output Module, output pin 2. The HSO.2 pin is a
dedicated output for the HSO module.
35
TDO
HSO.3
---
High Speed Output Module, output pin 3. The HSO.3 pin is a
dedicated output for the HSO module.
36
GND
V
SS
---
Digital circuit ground (0V). There are 4 V
SS
pins, all of which
must be connected and one additional recommeded V
SS
connec-
tion.
37
TI
EDACEN
Low
EDAC Enable. Asserting the EDACEN signal activates the
error detection and correction engine. This causes the
UT80C196KD to include ECB(5:0) as the EDAC check bit pins
in all external memory cycles.
38
TUQ
P2.7
---
Port 2 Pin 7. A quasi-bidirectional port pin that is read and writ-
ten at location 10h of HWindow 0.
TUQ
T2CAPTURE
High
Timer 2 Capture. A rising edge on this pin loads the value of
Timer 2 into the T2CAPTURE register, and generates a Timer 2
Capture interrupt (INT11, 2036h). Assert the T2CAPTURE sig-
nal for at least 2 state times to guarantee acknowledgment by the
interrupt controller. Using INT_Mask1.3 controls whether or not
a rising edge causes an interrupt.
39
TDO
P2.5
---
Port 2 Pin 5. An output only port pin that is written at location
10h of HWindow 0.
Setting IOC1.0 = 0 enables the P2.5 function of pin 39.
TDO
PWM0
---
Pulse Width Modulator (PWM) Output 0. The output signal
will be a waveform whose duty cycle is programmed by the
PWM0_CONTROL register, and the frequency is selected by
IOC2.2.
Setting IOC1.0 = 1 enables the PWM0 function of pin 39.
40
2
TUO
WR
Low
Write. The WR signal indicates that an external write is occur-
ring. Activation of this signal only occurs during external mem-
ory writes.
Setting CCR.2 = 1 enables the WR function of pin 40.
TUO
WRL
Low
Write Low. The WRL signal is activated when writing the low
byte of a 16-bit wide word, and is always asserted for 8-bit wide
memory writes.
Setting CCR.2 = 0 enables the WRL function of pin 40.
Table 10: 68-lead Flat Pack Pin Descriptions
QFP Pin#
I/O
Name
Active
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT80C196KD-WCC | MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC |
| UTC79L05 | VOLTAGE REGULATOR(66.37 k ) |
| UTC79L12 | VOLTAGE REGULATOR(66.37 k ) |
| UTCACB | Voltage-Controlled Oscillator |
| UTCALB | Voltage-Controlled Oscillator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT80C196KD-WCC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC |
| UT80CRH196KD | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
| UT80CRH196KD-WCA | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
| UT80CRH196KD-WCC | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
| UT80CRH196KD-WCX | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
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