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參數(shù)資料
| 型號： | UT80C196KD-WCA |
| 英文描述： | MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC |
| 中文描述： | 單片機(jī)| 16位| 8096的CPU |的CMOS | QFL | 68PIN |塑料 |
| 文件頁數(shù)： | 18/42頁 |
| 文件大小： | 190K |
| 代理商： | UT80C196KD-WCA |
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18
30
TUQ
P1.5
---
Port 1 Pin 5. A quasi-bidirectional port pin that is read and writ-
ten at location 0Fh of HWindow 0.
Setting WSR.7 = 0 enables the P1.5 function of pin 30.
TUO
BREQ
Low
Bus Request. The BREQ output signal asserts during a HOLD
cycle when the internal bus controller has a pending external
memory cycle.
During a HOLD cycle, BREQ will not be asserted until the
HLDA signal is asserted. Once asserted, BREQ does not deas-
sert until the HOLD signal is released.
Setting WSR.7 = 1 enables the BREQ function of pin 30.
31
2
TUQ
P1.6
---
Port 1 Pin 6. A quasi-bidirectional port pin that is read and writ-
ten at location 0Fh of HWindow 0.
Setting WSR.7 = 0 enables the P1.6 function of pin 31.
TUO
HLDA
Low
Bus Hold Acknowledge. The UT80C196KD asserts the HLDA
signal as a result of another device activating the HOLD signal.
By asserting this signal, the UT80C196KD is indicating that it
has released the bus.
Setting WSR.7 = 1 enables the HLDA function of pin 31.
32
TUQ
P1.7
---
Port 1 Pin 7. A quasi-bidirectional port pin that is read and writ-
ten at location 0Fh of HWindow 0.
Setting WSR.7 = 0 enables the P1.7 function of pin 32.
TUI
HOLD
Low
Bus Hold. The HOLD signal is used to request control of the
bus by another DMA device.
Setting WSR.7 = 1 enables the HOLD function of pin 32.
33
TUQ
P2.6
---
Port 2 Pin 6. A quasi-bidirectional port pin that is read and writ-
ten at location 10h of HWindow 0.
Setting IOC2.1 = 0 enables the P2.6 function of pin 33.
TUI
T2UP-DN
---
Timer 2 Up or Down. The T2UP-DN pin will dynamically
change the direction that Timer 2 counts.
T2UP-DN = 1 then Timer 2 counts down.
T2UP-DN = 0 then Timer 2 counts up.
Setting IOC2.1 = 1 enables the T2UP-DN function of pin 33.
When IOC2.1 = 0, Timer 2 will only count up.
Table 10: 68-lead Flat Pack Pin Descriptions
QFP Pin#
I/O
Name
Active
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT80C196KD-WCC | MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC |
| UTC79L05 | VOLTAGE REGULATOR(66.37 k ) |
| UTC79L12 | VOLTAGE REGULATOR(66.37 k ) |
| UTCACB | Voltage-Controlled Oscillator |
| UTCALB | Voltage-Controlled Oscillator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT80C196KD-WCC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|16-BIT|8096 CPU|CMOS|QFL|68PIN|PLASTIC |
| UT80CRH196KD | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
| UT80CRH196KD-WCA | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
| UT80CRH196KD-WCC | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
| UT80CRH196KD-WCX | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
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