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CHAPTER
19
FLASH
MEMOR
Y
Use
r’s
Man
ual
U17
446EJ5V0UD
283
Flash programming mode
control register (FLPMC)
Flash protect command
register (PFCMD)
Self programming mode setting register
Self programming mode
setting sequencer
HALT signal
Self programming command execution
Flash memory controller
Verify
circuit
Write
circuit
Erase
circuit
WEPRERR VCERR FPRERR
HALT release signal
FLCMD2 FLCMD1 FLCMD0
Internal bus
Flash programming command
register (FLCMD)
Increment
circuit
Flash memory
Protect byte
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0
5
Flash address
pointer H (FLAPH)
Flash address
pointer L (FLAPL)
Flash address pointer H
compare register
(FLAPHC)
Matched
Flash address pointer L
compare register
(FLAPLC)
Flash write buffer register
(FLW)
Not matched
Internal bus
Flash status register (PFS)
3
Figure 19-8. Block Diagram of Self Programming