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參數(shù)資料
| 型號(hào)： | UPD75P3018AGK-BE9 |
| 廠商： | NEC Corp. |
| 英文描述： | LJT 46C 40#20 4#16 2#8(COAX) |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 63/64頁 |
| 文件大?。?/td> | 356K |
| 代理商： | UPD75P3018AGK-BE9 |
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PD75P3018A
8
Data Sheet U11917EJ2V0DS00
3.2 Non-port Pins (1/2)
Pin Name
I/O
Alternate Function
Function
After Reset I/O Circuit
TypeNote 1
TI0
Input
P13
External event pulse input to timer/event counter
Input
<B>-C
TI1, TI2
P12/INT2
PTO0
Output
P20
Timer/event counter output
Input
E-B
PTO1
P21
PTO2
P22
PCL
P22
Clock output
BUZ
P23
Optional frequency output (for buzzer or system clock trimming)
SCK
I/O
P01
Serial clock I/O
Input
<F>-A
SO/SB0
P02
Serial data output
<F>-B
Serial data bus I/O
SI/SB1
P03
Serial data input
<M>-C
Serial data bus I/O
INT4
Input
P00
Edge detection vectored interrupt input
<B>
(both rising and falling edges detection)
INT0
Input
P10
Edge detection vectored interrupt input Noise elimination circuit/
Input
<B>-C
(detected edge is selectable)
asynchronous is selectable
INT1
P11
INT0/P10 can select noise elimination circuit. Asynchronous
INT2
P12/TI1/TI2
Rising edge detection testable input
Asynchronous
KR0-KR3
Input
P60-P63
Falling edge detection testable input
Input
<F>-A
KR4-KR7
Input
P70-P73
Falling edge detection testable input
Input
<F>-A
X1
Input
—
Ceramic/crystal oscillation circuit connection for main system
—
clock. If using an external clock, input to X1 and input
X2
—
inverted phase to X2.
XT1
Input
—
Crystal oscillation circuit connection for subsystem clock.
—
If using an external clock, input to XT1 and input inverted
XT2
—
phase to XT2. XT1 can be used as a 1-bit (test) input.
RESET
Input
—
System reset input (low level active)
—
<B>
MD0
Input
P30/LCDCL
Mode selection for program memory (PROM) write/verify
Input
E-B
MD1
P31/SYNC
MD2, MD3
P32, P33
D0-D3
I/O
P40-P43
Data bus for program memory (PROM) write/verify
Input
M-E
D4-D7
P50-P53
VPPNote 2
—
Program power supply voltage for program memory
—
(PROM) write/verify.
For normal operation, connect directly to VDD.
Apply +12.5 V for PROM write/verify.
VDD
—
Positive power supply
—
Vss
—
Ground
—
Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input.
2. The VPP pin does not operate correctly during normal operation unless connected to the VDD pin.
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