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參數(shù)資料
| 型號： | UPD75P3018AGK-BE9 |
| 廠商： | NEC Corp. |
| 英文描述： | LJT 46C 40#20 4#16 2#8(COAX) |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 20/64頁 |
| 文件大?。?/td> | 356K |
| 代理商： | UPD75P3018AGK-BE9 |
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PD75P3018A
27
Data Sheet U11917EJ2V0DS00
Instruction
Mnemonic
Operand
No. of Machine
Operation
Addressing
Skip
Group
Bytes
Cycle
Area
Condition
Branch
BRNote 1
addr
—
PC14
← 0, PC13-0 ← addr
*6
Use the assembler to select the
most appropriate instruction
among the following.
BR !addr
BRCB !caddr
BR $addr
addr1
—
PC14-0
← addr1
*11
Use the assembler to select
the most appropriate instruction
among the following.
BRA !addr1
BR !addr
BRCB !caddr
BR $addr1
!addr
3
PC14
← 0, PC13-0 ← addr
*6
$addr
1
2
PC14
← 0, PC13-0 ← addr
*7
$addr1
1
2
PC14-0
← addr1
PCDE
2
3
PC14
← 0, PC13-0 ← PC13-8+DE
PC14-0
← PC14-8+DE
PCXA
2
3
PC14
← 0, PC13-0 ← PC13-8+XA
PC14-0
← PC14-8+XA
BCDE
2
3
PC14
← 0, PC13-0 ← BCDENote 2
*6
PC14-0
← BCDENote 2
*11
BCXA
2
3
PC14
← 0, PC13-0 ← BCXANote 2
*6
PC14-0
← BCXANote 2
*11
BRANote 1
!addr
3
PC14
← 0, PC13-0 ← addr
*6
33
PC14-0
← addr1
*11
BRCBNote 1
!caddr
2
PC14
← 0, PC13-0 ← PC13, 12+caddr11-0
*8
PC14-0
← PC14, 13, 12+caddr11-0
Notes 1. Shaded areas indicate support for Mk II mode only. Other areas indicate support for Mk I mode only.
2. The only following bits are valid in the B register.
For Mk I mode : Low-order 2 bits
For Mk II mode : Low-order 3 bits
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