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參數(shù)資料
| 型號： | UPD75P3018AGK-BE9 |
| 廠商： | NEC Corp. |
| 英文描述： | LJT 46C 40#20 4#16 2#8(COAX) |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 41/64頁 |
| 文件大?。?/td> | 356K |
| 代理商： | UPD75P3018AGK-BE9 |
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PD75P3018A
46
Data Sheet U11917EJ2V0DS00
DC Programming Characteristics (TA = 25
±5°C, VDD = 6.0 ±0.25 V, VPP = 12.5 ±0.3 V, VSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
High-level input voltage
VIH1
Pins other than X1, X2
0.7VDD
VDD
V
VIH2
X1, X2
VDD – 0.5
VDD
V
Low-level input voltage
VIL1
Pins other than X1, X2
0
0.3VDD
V
VIL2
X1, X2
0
0.4
V
Input leakage current
ILI
VIN = VIL or VIH
10
A
High-level output voltage
VOH
IOH = –1 mA
VDD – 1.0
V
Low-level output voltage
VOL
IOL = 1.6 mA
0.4
V
VDD supply current
IDD
30
mA
VPP supply current
IPP
MD0 = VIL, MD1 = VIH
30
mA
Cautions 1. Ensure that VPP does not exceed +13.5 V including overshoot.
2. VDD must be applied before VPP, and cut after VPP.
AC Programming Characteristics (TA = 25
±5°C, VDD = 6.0 ±0.25 V, VPP = 12.5 ±0.3 V, VSS = 0 V)
Parameter
Symbol
Note 1
Conditions
MIN.
TYP.
MAX.
Unit
Address setup timeNote 2 (to MD0
↓)tAS
tAS
2
s
MD1 setup time (to MD0
↓)tM1S
tOES
2
s
Data setup time (to MD0
↓)tDS
tDS
2
s
Address hold timeNote 2 (from MD0
↑)tAH
tAH
2
s
Data hold time (from MD0
↑)tDH
tDH
2
s
MD0
↑→Data output float delay time
tDF
0
130
ns
VPP setup time (to MD3
↑)tVPS
tVPS
2
s
VDD setup time (to MD3
↑)tVDS
tVCS
2
s
Initial program pulse width
tPW
0.95
1.0
1.05
ms
Additional program pulse width
tOPW
0.95
21.0
ms
MD0 setup time (to MD1
↑)tM0S
tCES
2
s
MD0
↓→Data output delay time
tDV
MD0 = MD1 = VIL
1
s
MD1 hold time (from MD0
↑)tM1H
tOEH
tM1H + tM1R
≥ 50
s2
s
MD1 recovery time (from MD0
↓)tM1R
tOR
2
s
Program counter reset time
tPCR
—10
s
X1 input high-/low-level widths
tXH, tXL
—
0.125
s
X1 input frequency
fX
—
4.19
MHz
Initial mode setting time
tI
—2
s
MD3 setup time (to MD1
↑)tM3S
—2
s
MD3 hold time (from MD1
↓)tM3H
—2
s
MD3 setup time (to MD0
↓)tM3SR
—
Program memory read
2
s
Data output delay time from addressNote 2
tDAD
tACC
Program memory read
2
s
Data output hold time from addressNote 2
tHAD
tOH
Program memory read
0
130
s
MD3 hold time (from MD0
↑)tM3HR
—
Program memory read
2
s
MD3
↓→Data output float delay time
tDFR
—
Program memory read
2
s
Notes 1. Symbol of corresponding
PD27C256A
2. The internal address signal is incremented by 1 on the 4th rise of the X1 input, and is not connected to a pin.
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