參數(shù)資料
型號(hào)： UPD75P3018AGK-9EU
廠商： NEC Corp.
元件分類： 圓形連接器
英文描述： Circular Connector; No. of Contacts:56; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:25-4 RoHS Compliant: No
中文描述： 4位單片機(jī)
文件頁(yè)數(shù)： 35/64頁(yè)
文件大?。?/td> 356K
代理商： UPD75P3018AGK-9EU
PD75P3018A
40
Data Sheet U11917EJ2V0DS00
Serial transfer operation
2-wire and 3-wire serial I/O modes (SCK ... internal clock output): (TA = –40 to +85
°C, VDD = 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK cycle time
tKCY1
VDD = 2.7 to 5.5 V
1300
ns
3800
ns
SCK high-/low-level width
tKL1, tKH1
VDD = 2.7 to 5.5 V
tKCY1/2–50
ns
tKCY1/2–150
ns
SINote 1 setup time (to SCK
↑) tSIK1
VDD = 2.7 to 5.5 V
150
ns
500
ns
SINote 1 hold time (from SCK
↑) tKSI1
VDD = 2.7 to 5.5 V
400
ns
600
ns
SCK
↓ → SONote 1 output
tKSO1
RL = 1 k
, Note 2
VDD = 2.7 to 5.5 V
0
250
ns
delay time
CL = 100 pF
0
1000
ns
Notes 1. In 2-wire serial I/O mode, read SB0 or SB1 instead.
2. RL and CL respectively indicate the load resistance and load capacitance of the SO output line.
2-wire and 3-wire serial I/O modes (SCK ... external clock input): (TA = –40 to +85
°C, VDD = 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK cycle time
tKCY2
VDD = 2.7 to 5.5 V
800
ns
3200
ns
SCK high-/low-level width
tKL2, tKH2
VDD = 2.7 to 5.5 V
400
ns
1600
ns
SINote 1 setup time (to SCK
↑) tSIK2
VDD = 2.7 to 5.5 V
100
ns
150
ns
SINote 1 hold time (from SCK
↑) tKSI2
VDD = 2.7 to 5.5 V
400
ns
600
ns
SCK
↓ → SONote 1 output
tKSO2
RL = 1 k
, Note 2
VDD = 2.7 to 5.5 V
0
300
ns
delay time
CL = 100 pF
0
1000
ns
Notes 1. In 2-wire serial I/O mode, read SB0 or SB1 instead.
2. RL and CL respectively indicate the load resistance and load capacitance of the SO output line.
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