
3
μ
P
A
C
M
I
L
O
Mne-
monic
Ope-
rands
Operation Code
Operation
Skip
B1
B2
Condition
LAI
n4
0
0
0
1
I
3
I
2
I
1
I
0
A
←
n4
Loads n4 to the accumulator.
Stack LAI
LHI
n2
0
0
1
0
1
0
I
1
I
0
H
←
n2
Loads n2 to H register.
LAM
pr
0
1
0
1
0
0
R
1
R
0
A
←
(pr) pr = HL –, HL +, HL
Loads the contents of the memory
address by pr to the accumulator.
L = FH(HL –)
L = 0 (HL +)
LHLI
n5
1
1
0
I
4
I
3
I
2
I
1
I
0
H
←
0I
4
, L
←
I
3
–
0
Loads n5 to the pair register HL.
Stack LHLI
ST
0
1
0
1
0
1
1
1
(HL)
←
A
Stores the contents of the accumulator
in the memory addressed by HL.
STII
n4
0
1
0
0
I
3
I
2
I
1
I
0
(HL)
←
n4, L
←
L+1
Stores n4 in the memory addressed by
HL and increments the L register.
XAL
0
1
1
1
1
0
1
1
A
L
Exchanges the contents of the accumu-
lator and the L register.
XAM
pr
0
1
0
1
0
1
R
1
R
0
A
(pr) pr = HL – , HL + , HL
Exchanges the contents of the accumu-
lator and the memory addressed by pr.
L = FH(HL–)
L = 0 (HL+)
AISC
n4
0
0
0
0
I
3
I
2
I
1
I
0
A
←
A + n4
Adds the accumulator to n4.
Carry
ASC
0
1
1
1
1
1
0
1
A
←
A + (HL)
Adds the contents of the accumulator
and the memory addressed by HL.
Carry
Adds the contents of the accumulator,
the memory addressed by HL, and of
the carry flag.
ACSC
0
1
1
1
1
1
0
0
A, C
←
A + (HL) + C
Carry
Calculate the exclusive OR of the
contents of the accumulator and the
memory addressed by HL.
EXL
0
1
1
1
1
1
1
0
A
←
A
(HL)
CMA
0
1
1
1
1
1
1
1
A
←
A
Complements the accumulator.
RC
0
1
1
1
1
0
0
0
C
←
0
Resets the carry flag.
SC
0
1
1
1
1
0
0
1
C
←
1
Sets the carry flag.
ILS
0
1
0
1
1
0
0
1
L
←
L + 1
Increments the L register.
L = 0
IDRS
mem
0
0
1
1
1
1
0
1
0
0
D
5
D
4
D
3
D
2
D
1
D
0
(mem)
←
(mem) + 1
Increments the contents of the memory
addressed by mem.
(mem) = 0
DLS
0
1
0
1
1
0
0
0
L
←
L – 1
Decrements the L register.
L = FH
DDRS
mem
0
0
1
1
1
1
0
0
0
0
D
5
D
4
D
3
D
2
D
1
D
0
(mem)
←
(mem) – 1
Decrements the contents of the memory
addressed by mem.
(mem) = FH
RMB
bit
0
1
1
0
1
0
B
1
B
0
(HL)
bit
←
0
Resets the bits specified by B
1–0
, of the
memory addressed by HL.
SMB
bit
0
1
1
0
1
1
B
1
B
0
(HL)
bit
←
1
Sets the bits specified by B
1–0
, of the
memory addressed by HL.
I
m
M
M
I
Note
Instruction Group
Note