參數(shù)資料
型號： UPD703100AF1-33-FA1
廠商： NEC Corp.
英文描述： V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： V850E/MS1TM 32/16單晶片微控制器
文件頁數(shù)： 91/132頁
文件大小： 1174K
代理商： UPD703100AF1-33-FA1
Preliminary Data Sheet U14168EJ2V0DS00
91
μ
PD703100A-33, 703100A-40, 703101A-33, 703102A-33
(5) Page ROM access timing (2/2)
CLKOUT (Output)
On-page address
Note
T1
TDW
TW
T2
TO1
TPRW
TW
TO2
<24>
<25>
<24>
<25>
<24>
<25>
<24>
<25>
<26>
<27>
<36>
<32>
<31>
<53>
<55>
<27>
<26>
<36>
<37>
<33>
<30>
<54>
Off-page address
Note
CSn (Output)
UWR, LWR (Output)
RD (Output)
D0 to D15 (I/O)
WAIT (Input)
BCYST (Output)
Note
On-page and off-page addresses are as follows.
PRC Register
MA5
MA4
MA3
On-page Addresses
Off-page Addresses
0
0
0
A0, A1
A2 to A23
0
0
1
A0 to A2
A3 to A23
0
1
1
A0 to A3
A4 to A23
1
1
1
A0 to A4
A5 to A23
Remarks 1.
This is the timing for the following case.
Number of waits due to the DWC1 and DWC2 registers (TDW): 1
Number of waits due to the PRC register (TPRW): 1
2.
The broken lines indicate high impedance.
3.
n = 0 to 7
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