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參數(shù)資料
| 型號(hào)： | UPD4616112 |
| 廠商： | NEC Corp. |
| 英文描述： | 16M-BIT CMOS MOBILE SPECIFIED RAM 1M-WORD BY 16-BIT |
| 中文描述： | 1,600位CMOS移動(dòng)指明內(nèi)存100萬(wàn)字由16位 |
| 文件頁(yè)數(shù)： | 26/32頁(yè) |
| 文件大小： | 220K |
| 代理商： | UPD4616112 |
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Data Sheet M15085EJ5V0DS
26
μ
PD4616112
#
Read Write Cycle Timing Chart 2 (/LB, /UB Independent Controlled 2)
t
WP
I/O0 - 7 (Input)
t
RC1
/WE (Input)
/CS (Input)
Address (Input)
/LB (Input)
High impedance
High impedance
/UB (Input)
t
BW
t
WC1
t
WR
I/O8 - 15 (Output)
High impedance
High impedance
t
BHZ
t
DW
t
DH
t
RWC
t
BLZ
t
BRS
t
BA
t
CW
t
AS
Data in
Data out
Note
Note
Cautions 1. During address transition, at least one of pins /CS, /WE should be inactivated.
2. Do not input data to the I/O pins while they are in the output state.
3. If the address is changed using a value that is either lower than the minimum value or higher
than the maximum value for the identical address read cycle time (t
RC1
) and the identical address
write cycle time (t
WC1
), none of the data can be guaranteed.
Note
Make settings so that the sum (t
RWC
) of the identical address read cycle time (t
RC1
) and the identical address
write cycle time (t
WC1
) is 10
μ
s or less when a write is performed at the identical address using /UB following a
read using /LB with /CS low level, or when a write is performed using /LB following a read using /UB.
Remark
Write operation is done during the overlap time of a Low /CS, /WE, /LB and/or /UB.
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