參數(shù)資料
型號(hào)： UPD31172F1-48-FN
廠商： NEC Corp.
英文描述： VRC4172TM COMPANION CHIP FOR VR4121TM
中文描述： VRC4172TM伴侶芯片VR4121TM
文件頁(yè)數(shù)： 13/44頁(yè)
文件大?。?/td> 278K
代理商： UPD31172F1-48-FN
Data Sheet U14388EJ2V0DS00
13
μ
PD31172
1.3 External Processing of Pins and Drive Capacity
When using the V
RC
4172, process the pins externally, as shown in the table below.
(1/2)
Signal Name
External Processing
Drive Capacity
Tolerance
SCLK
80 pF
3 V
AD (0:24)
80 pF
3 V
DATA (0:31)
80 pF
3 V
LCDCS#
Pull up
3 V
RD#
Pull up
Note 1
80 pF
3 V
WR#
Pull up
Note 1
80 pF
3 V
LCDRDY
Pull up
40 pF
3 V
ROMCS (2:3)#
Pull up
80 pF
3 V
CKE
Pull down
80 pF
3 V
UUCAS#
Pull up
Note 1
80 pF
3 V
ULCAS#
Pull up
Note 1
80 pF
3 V
MRAS (0:1)#
Pull up
Note 1
80 pF
3 V
UCAS#
Pull up
Note 1
80 pF
3 V
LCAS#
Pull up
Note 1
80 pF
3 V
IOR#
Pull up
Note 1
3 V
IOW#
Pull up
Note 1
3 V
RESET
3 V
IOCS16#
Pull up
40 pF
3 V
IOCHRDY
Pull up
40 pF
3 V
HOLDRQ#
40 pF
3 V
HOLDAK#
Pull up
3 V
SRAS#
Pull up
Note 1
80 pF
3 V
SCAS#
Pull up
Note 1
80 pF
3 V
BUSRQ (0:1)#
3 V
BUSAK (0:1)#
40 pF
3 V
INTRP
40 pF
3 V
IRQ
40 pF
3 V
USBINT#
40 pF
3 V
PS2INT
40 pF
3 V
BUSCLK
3 V
ARBCLKSEL
3 V
DP (1:2)
Note 2
5 V
DN (1:2)
Note 2
5 V
Notes 1.
The same specification has been made for these pins in the V
R
4121. If these pins have been processed in
the V
R
4121, there is no need to perform this processing in the V
RC
4172.
2.
In full-speed mode: 50 pF, In low-speed mode: 350 pF
Remark
There is no need to perform external processing if no particular external processing has been specified (
).
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