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μ
PD17016, 17017
314
APPENDIX B. DIFFERENCES AMONG
μ
PD17016, 17017, 17003A, 17005, AND 17010
(1) Hardware
Item
μ
PD17010
μ
PD17003A
μ
PD17005
ROM
16 KB
(7932
×
16 bits)
8 KB
(3836
×
16 bits)
16 KB
(7932
×
16 bits)
RAM
432
×
4 bits
320
×
4 bits
432
×
4 bits
Output port
13 pins (+30: LCD segment pins)
9 pins (+30: LCD segment pins)
Control register
41
×
4 bits
33
×
4 bits
General register pointer
5 bits
4 bits
Stack level
9 levels
7 levels
Serial interface
2 modes (3 channels): serial I/O mode, I
2
C bus mode
SIO0 clock
37.5, 75, 112.5, 225 kHz
SIO1 clock
External, 37.5, 75, 450 kHz
Hysteresis characteristics for SCL, SDA,
SCK
0
, SCK
1
, SI
0
, and SI
1
pins
SIO1 clock
75, 150, 225, 450 kHz
SIO2 clock
External, 75, 150, 450 kHz
D/A converter frequency
4394.5 Hz
878.9 Hz
D/A converter output (PWM)
3 channels
Interrupt
6 sources
External: 1 source (INT
0
pin)
Internal :
4 sources (TM, BTM1, SIO0, IFC)
External/internal: 1 source (INT
1
pin or
overflow of timer/counter)
Interrupt priority (vector address)
1.
(6H) INT
0
pin
2.
(5H) INT
1
pin
(shared with overflow of timer/counter)
3.
(4H) 12-bit timer
4.
(3H) Basic timer 1
5.
(2H) Serial interface 0
6.
(1H) Frequency counter
Automatic saving of system register (3 levels)
(WR, BANK, RP, PSWORD)
Address change of IRQxxx flag
5 sources
External: 2 sources (INT
0
and INT
1
pins)
Internal : 3 sources (TM, SIO1, IFC)
Interrupt priority (vector address)
1.
(5H) INT
0
pin
2.
(4H) INT
1
pin
3.
(3H) Timer
4.
(2H) Serial interface 1
5.
(1H) Frequency counter
Automatic saving of system register (4 levels)
(BANK, IXE)
Timer
Basic timer 0 carry
(1, 5, 100, 250 ms)
Basic timer 1 interrupt
(1, 5, 100, 250 ms)
12-bit timer
(10
μ
s to 4095 ms)
Timer carry
(1, 5, 100, 250 ms)
Timer interrupt
(1, 5, 100, 250 ms)
Frequency counter
Frequency measurement (IF measurement) and external gate width measurement functions
selectable
Clock generator port (CGP)
CGP output: 1 line
SG (Signal Generator) function
VDP (Variable Duty Pulse) function
PLL frequency synthesizer
phase comparator
Provided
(Unlock detection by program. Unlock FF delay time selectable)
Operational amplifier for
PLL frequency synthesizer
lowpass filter
None
Provided
Package
80-pin plastic QFP (14
×
20 mm)