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參數(shù)資料
| 型號： | UDA1342 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | Codec |
| 英文描述： | Audio CODEC |
| 中文描述： | 音頻編解碼器 |
| 文件頁數(shù)： | 16/44頁 |
| 文件大?。?/td> | 180K |
| 代理商： | UDA1342 |
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2000 Mar 29
16
Philips Semiconductors
Preliminary specification
Audio CODEC
UDA1342TS
8.15.4
D
ATA WRITE MODE
The data write format is given in Table 13 and illustrated
in Fig.9.
When writing data to a device four bytes must be sent:
1.
One byte with the device address, being ‘01X0 1000’
where ‘X’ stands for the IPSEL value, including ‘01’ for
signalling write to the device.
2.
One byte starting with a logic 0 for signalling write
followed by 7 bits indicating the register address.
3.
One byte which is the Most Significant Data (MSD)
byte 1.
4.
One byte which is the Least Significant Data (LSD)
byte 2.
8.15.5
D
ATA READ MODE
The data write format is given in Table 14 and illustrated
in Fig.10.
Whenreadingfromthedevice,apreparereadmustfirstbe
done. After the prepare read, the device address is sent
again. The device then returns with the register address,
indicating whether the address was valid or not, and the
data of the register.
The data read mode is explained below:
1.
One byte with the device address, being ‘01X0 1000’
where ‘X’ stands for the IPSEL value, including ‘01’ for
signalling write to the device.
2.
One byte is sent with the register address which needs
to be read. This byte starts with a logic 1, which
indicates that there will be a read action from the
register.
3.
One byte with the device address including ‘11’ is sent
to the device. The ‘11’ indicates that the device must
write data to the microcontroller.
4.
The device now writes the requested register address
on the L3-bus, indicating whether the requested
register was valid (logic 0) or invalid (logic 1).
5.
The device writes data from the requested register to
the L3-bus with the MSD byte 1 first, followed by the
LSD byte 2.
Table 13
L3-bus format for data write
Table 14
L3-bus format for prepare read and read data
L3MODE
DATA TYPE
FIRST IN TIME
LAST IN TIME
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
Address
Data transfer 1
Data transfer 2
Data transfer 3
device address
register address
MSD byte 1
LSD byte 2
0
0
1
IPSEL
A5
D13
D5
0
1
0
0
0
A6
D14
D6
A4
D12
D4
A3
D11
D3
A2
D10
D2
A1
D9
D1
A0
D8
D0
D15
D7
L3MODE
DATA TYPE
FIRST IN TIME
LAST IN TIME
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
Prepare read
Address
Data transfer 1
device address
register address
0
1
1
IPSEL
A5
0
1
0
0
0
A6
A4
A3
A2
A1
A0
Read data
Address
Data transfer 1
Data transfer 2
Data transfer 3
device address
register address
MSD byte 1
LSD byte 2
1
1
IPSEL
A5
D13
D5
0
1
0
0
0
0/1
D15
D7
A6
D14
D6
A4
D12
D4
A3
D11
D3
A2
D10
D2
A1
D9
D1
A0
D8
D0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1342TS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Audio CODEC |
| UDA1342TS/N1 | 制造商:NXP Semiconductors 功能描述:IC CODEC AUDIO MINIDISC 28-SSOP 制造商:NXP Semiconductors 功能描述:IC, CODEC, AUDIO, MINIDISC, 28-SSOP 制造商:NXP Semiconductors 功能描述:IC, CODEC, AUDIO, MINIDISC, 28-SSOP; Audio CODEC Type:Stereo Codec; No. of ADCs:4; No. of DACs:2; No. of Input Channels:4; No. of Output Channels:2; Audio IC Case Style:SSOP; No. of Pins:28; ADC / DAC Resolution:24bit; ADCs / DACs ;RoHS Compliant: Yes |
| UDA1342TS/N1,512 | 功能描述:接口—CODEC AUDIO CODEC MINIDISC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1342TS/N1,518 | 功能描述:接口—CODEC MINISOUND 3 RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1342TSDB | 功能描述:接口—CODEC AUDIO CODEC MINIDISC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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