參數(shù)資料
型號: UCC28089DRB
廠商: Texas Instruments, Inc.
英文描述: PRIMARY-SIDE PUSH-PULL OSCILLATOR WITH DEAD-TIME CONTROL
中文描述: 一次側(cè)推拉振蕩器死區(qū)時間控制
文件頁數(shù): 4/19頁
文件大?。?/td> 336K
代理商: UCC28089DRB
SLUS623 SEPTEMBER 2004
4
www.ti.com
ELECTRICAL CHARACTERISTICS:
TA = 40
°
C to 105
°
C for UCC28089, VDD = 9 V (see Note 1), 1
μ
F capacitor from VDD to GND, RA = 110 k
, RB = 182
, CT = 220 pF, TA = TJ,
(unless otherwise noted).
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNITS
Overall Section
Startup current
VDD < UVLO start threshold (see Note 2)
130
260
μ
A
mA
Operating supply current
CS = 0 V, (see Note 1, Note 2)
1.4
2.0
Undervoltage Lockout
Start threshold
See Note 1
9.5
10.5
11.5
Minimum operating voltage after start
7.4
8.0
8.4
V
Hysteresis
2.1
2.5
2.9
Oscillator
Oscillator frequency
2 x OUTx frequency, Measured at output(s)
180
200
220
kHz
Current Sense
Current Shutdown threshold
Resetting current limit
0.650
0.725
0.800
V
CS to output delay
CS from 0 mV to 900 mV
45
100
ns
Output
Dead Time
Measured at OUTA or OUTB
90
100
110
ns
Over temperature
80
125
Minimum duty cycle
CS = 0.9 V
0
%
VOL (OUTA or OUTB)
IOUT = 75 mA
IOUT = 35 mA, (VDD – VOUT)
TA = 25
°
C IOUT = 1 mA (see Note 4)
TA = full range IOUT = 1 mA (see Note 4)
TA = 25
°
C IOUT = 1 mA (see Note 4)
TA = full range IOUT = 1 mA (see Note 4)
CLOAD = 1 nF
CLOAD = 1 nF
0.5
1
V
VOH (OUTA or OUTB)
1.0
1.3
Output resistance high
70
80
90
40
80
135
Output resistance low
6.5
7.5
8.5
4
7.5
14
tr, Rise Time
28
50
ns
tf, Fall Time
13
30
SYNC
SYNC duration
Measured at SYNC pin
75
95
115
tr, delay
Rising SYNC until falling OUTA or OUTB
0
8.5
30
ns
tf, delay
Falling SYNC until rising OUTA or OUTB
0
14
50
SYNC VOH
SYNC VOL
tr, Rise Time
ISYNC = 5 mA (VDD – VSYNC)
ISYNC = 5 mA
CLOAD = 100 pF
CLOAD = 100 pF
0.3
1
V
0.3
1
15
30
ns
tf, Fall Time
15
30
Soft Start & Fault
OUTA/OUTB start delay time
Cycles as measured at CT pin
57
59
62
OUTA/OUTB soft start duration
First output stage cycle to first full output stage cycle,
CS
0.6 V
4
5
7
cycles
NOTES:
1. Set VDD above the start threshold before setting at 9V.
2. Does not include current of the external oscillator network.
3. Ensured by design. Not 100% tested in production.
4. The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resisstance is the RDS(ON)
of the MOSFET transistor when the voltage of the driver output is less than the saturation voltage of the bipolar transistor.
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