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參數(shù)資料
| 型號(hào)： | UCB1100 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Advanced modem/audio analog front-end |
| 中文描述： | 先進(jìn)的調(diào)制解調(diào)器/音頻模擬前端 |
| 文件頁數(shù)： | 19/36頁 |
| 文件大小： | 290K |
| 代理商： | UCB1100 |
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Philips Semiconductors
Preliminary specification
UCB1100
Advanced modem/audio analog front-end
1998 May 08
19
6.5
The UCB1100 includes a 10 bit successive approximation analogue
to digital converter (ADC) with build in track and hold circuitry, an
analogue multiplexer to select 4 analogue inputs or the 5 touch
screen voltages and 4 switched resistive voltage dividers on the
analogue ad0–3 high voltage inputs. The ADC is used to readout the
touch screen inputs and it measures the voltage on the four
analogue high voltage inputs ad0–3.
10 bit ADC
The ADC is controlled through the SIB interface. It is enabled by the
adc_enablebit in register 10; the ADC circuitry, including the track
and hold circuitry does not consume any power when it is not
enabled.
A complete analogue to digital conversion consists of several
phases. First the ADC input selector must be set to the proper input.
Secondly the track and hold must track the signal; this requires a
certain settling time if the adc input was changed. After this time the
sample is taken. A calibration of the ADC circuitry is performed
before the actual conversion starts. The result of the conversion is
stored in the register 11 of the SIB interface, after the completion of
the conversion. An interrupt may be generated whenever a
conversion is completed, depending of the setting of the
adc_interrupt_enabits in the sib register 2 and 3. The
adc_data_validbit in the SIB register 11 indicates the status of the
ADC; it equals ‘0’ when a ADC sequence is started and it equals ‘1’
when the ADC result is stored in the SIB register 11.
The ADC sequence is started in two ways. First it starts whenever
the adc_startbit in register 10 is changed from ‘0’ to ‘1’; this is the
case when the adc_sync_enabit in registers 10 equals ‘0’
(=default). Internal logic determines whether the adc input
multiplexer setting was changed in the sib frame, carrying the
adc_start bit transition. If this is the case, an additional tracking time
is added automatically.
The second mode of operation is activated when the adc_sync_ena
bit is set to ‘1’. In this mode the ADC conversion is not started by an
‘0’ to ‘1’ transition of the adc_startbis, but is ‘a(chǎn)rmed’. During the
arming situation the track and hold circuit tracks the selected input
signal. A sample is taken and the actual ADC conversion is started
when a rising edge is detected on the adcsync input pin.
mux
9 to 1
track & hold
10 bit ADC
10
to external register 11
ADC start
stop logic
adc_sync_ena
adc
sync
internal reference
adcsync
SN00144
Figure 19.
Block Diagram of the 10 bit ADC Circuit
tadcena
tadctrk
tadccal
tconv
track
cal
conversion
track
adc_ena
adc_input_selection
adc_start
’adc state’
adc_dat_valid
adc_data
SN00145
Figure 20.
Timing Diagram of an ADC Conversion Sequence (adc_sync_ena=‘0’)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UCB1100LP | Advanced modem/audio analog front-end |
| UCB1200 | Advanced modem/audio analog front-end |
| UCB1200BE | Advanced modem/audio analog front-end |
| UCB1300 | Advanced modem/audio analog front-end |
| UCB1300BE | Advanced modem/audio analog front-end |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UCB1100LP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced modem/audio analog front-end |
| UCB1100LP/X3 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced modem/audio analog front-end |
| UCB-12 | 功能描述:斷路器 CIRCUIT BREAKER RoHS:否 制造商:Phoenix Contact 產(chǎn)品:Device Circuit Breakers 產(chǎn)品類型:Thermomagnetic 電流額定值:2 A 電壓額定值 AC:240 V, 277 V 電壓額定值 DC:50 V 極數(shù):1 Pole 執(zhí)行器類型:Slide 電路功能:Trip Free 系列:CB TM1 工作溫度范圍:- 30 C to + 60 C 照明:No |
| UCB1200 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced modem/audio analog front-end |
| UCB1200B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UCB1200B |
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