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參數(shù)資料
| 型號(hào)： | UC62LV4096 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Low Power CMOS SRAM |
| 中文描述： | 低功耗CMOS SRAM |
| 文件頁(yè)數(shù)： | 3/9頁(yè) |
| 文件大小： | 145K |
| 代理商： | UC62LV4096 |
Low Power CMOS SRAM
256K X 16
UC62LV4096
-55/-70
DC ELECTRICAL CHARACTERISTICS (TA=0
to 70
)
Symbol
Comment
Guaranteed Input Low
Voltage
Guaranteed Input High
Voltage
Test Condition
MIN.
TYP.
(1)
MAX.
UNITS
V
IL
V
CC
=2.4V
-0.5
-
0.8
V
V
IH
V
CC
=3.6V
2.0
-
Vcc-0.2
V
I
L
Input Leakage Current
V
CC
=3.6V V
IN
=0V to V
CC
-
-
1
uA
I
OL
Output Leakage Current
V
CC
=3.6V CE\=V
IH
or OE\=V
IH
V
IO
=0V t V
CC
-
-
1
uA
V
OL
Output Low Voltage
V
CC
=3.6V, I
OL
=2mA
-
-
0.4
V
V
OH
Output High Voltage
V
CC
=3.0V, I
OH
=-1mA
2.4
-
-
V
I
CC
Operating Power Supply
Current
CE\=V
IL
,I
DQ
=0mA, F=Fmax
(3)
-
-
35
mA
I
SB1
TTL Standby Current
CE\=V
IH
, V
IN
=V
IH
to V
IL
-
-
1
mA
I
SB2
CMOS Standby Current
CE\
or 0.2V , F=0
V
-0.2V, V
IN
=V
CC
-0.2V
-
2
10
uA
1. Typical characteristics are at TA = 25
o
C.
2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.
3. Fmax = 1/tRC .
4. F=0 means input signals must be keep in static state.
DATA RETENTION CHARACTERISTICS ( TA=0
to 70
)
Symbol
Comment
Test Condition
MIN.
TYP.
(1)
MAX.
UNITS
V
DR
VCC to Data Retention
CE\
V
CE\
V
IN
V
CC
- 0.2V
V
CC
-0.2V or V
IN
V
CC
- 0.2V
V
CC
-0.2V or V
IN
0.2V
1.2
-
-
V
I
CCDR
Data Retention Current
0.2V
-
0.1
1
uA
t
DR
Chip Deselect to Data
Retention Time
0
-
-
ns
t
R
Operation Recovery Time
See Retention Waveform
T
RC
(2)
-
-
ns
1.
V
CC
= 1.5V, TA = 25
.
2.
t
RC
= Read Cycle Time
LOW VCC DATA RETENTION WAVEFORM
(1)
(CE\ Controlled)
Data Retention Mode
V
DR
>= 1. 2V
t
CDR
t
R
VIH
VIH
CE >= V
CC
- 0. 2V
Vcc
CE
U-Chip Technology Corp. LTD.
Reserves the right to modify document contents without notice.
PAGE
3
Preliminary
Rev. 1.0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UC62LV4096AC-20 | Low Power CMOS SRAM |
| UC62LV4096AC-25 | Low Power CMOS SRAM |
| UC62LV4096AI-20 | Low Power CMOS SRAM |
| UC62LV4096AI-25 | Low Power CMOS SRAM |
| UC62LV4096JC-20 | Low Power CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UC62LV4096AC-20 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LV4096AC-25 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LV4096AI-20 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LV4096AI-25 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LV4096JC-20 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Low Power CMOS SRAM |
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