參數(shù)資料
型號(hào): UC3842BVD1R2
英文描述: I2C BUS-CONTROLLED MULTISTANDARD SINGLE CHIP TV PROCESSOR
中文描述: 模擬IC
文件頁數(shù): 14/20頁
文件大?。?/td> 296K
代理商: UC3842BVD1R2
UC3842B, UC3843B, UC2842B, UC2843B, NCV3843BV
http://onsemi.com
14
+
-
+
-
5.0V Ref
36V
S
RQ
Bias
+
1.0mA
Osc
R
R
R
2R
EA
1.0V
7(12)
7(11)
6(10)
5(8)
3(5)
R
S
V
CC
V
in
1(1)
2(3)
4(7)
8(14)
R
T
C
T
The buffered oscillator ramp can be resistively summed with either the voltage
feedback or current sense inputs to provide slope compensation.
m
- 3.0m
-m
R
f
C
f
R
i
R
d
From V
O
R
Slope
MPS3904
5(9)
Comp/Latch
Figure 32. Error Amplifier Compensation
+
R
2R
1.0mA
EA
2(3)
5(9)
2.5V
1(1)
R
f
C
f
R
d
R
i
From V
O
Error Amp compensation circuit for stabilizing any current mode topology except for boost and flyback
converters operating with continuous inductor current.
R
f
8.8 k
+
R
2R
1.0mA
EA
2(3)
5(9)
2.5V
1(1)
R
f
C
f
R
d
R
p
From V
O
Error Amp compensation circuit for stabilizing current mode boost and flyback
topologies operating with continuous inductor current.
C
p
R
i
Figure 33. Slope Compensation
相關(guān)PDF資料
PDF描述
UC3842BVDR2 I2C BUS-CONTROLLED MULTISTANDARD SINGLE CHIP TV PROCESSOR
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UC3843BDR2 1-bit dual supply bus buffer level translator with A-side series resistor
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