參數(shù)資料
型號(hào): UC3842BVD1R2
英文描述: I2C BUS-CONTROLLED MULTISTANDARD SINGLE CHIP TV PROCESSOR
中文描述: 模擬IC
文件頁數(shù): 12/20頁
文件大小: 296K
代理商: UC3842BVD1R2
UC3842B, UC3843B, UC2842B, UC2843B, NCV3843BV
http://onsemi.com
12
+
-
+
-
S
R
+
R
R
R
2R
VClamp
1.67
R2
R1
1
Ipk(max)
VClamp
RS
5.0V Ref
Q
Bias
Osc
EA
1.0V
5(9)
7(11)
6(10)
5(8)
3(5)
R
S
Q1
V
CC
V
in
1(1)
2(3)
4(7)
8(14)
R
1
V
Clamp
R
2
Where: 0
V
Clamp
1.0 V
C
MPSA63
tSoftStart
In 1
VC
3VClamp
C
R1R2
R1
R2
7(12)
1.0 mA
Comp/Latch
5.0V Ref
+
-
S
R
Q
Bias
+
1.0mA
Osc
R
R
R
2R
EA
1.0V
5(9)
1(1)
2(3)
4(7)
8(14)
C
1.0M
t
Soft-Start
3600C in
μ
F
Figure 24. Soft–Start Circuit
Figure 25. Adjustable Buffered Reduction of
Clamp Level with Soft–Start
+
-
5.0V Ref
+
-
S
R
Q
(11)
(10)
(8)
Comp/Latch
(5)
R
S
1/4 W
V
CC
V
in
K
M
D
SENSEFET
G
S
Power Ground:
To Input Source
Return
Control Circuitry Ground:
To Pin (9)
Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch. For proper operation during over-current conditions, a
reduction of the I
pk(max)
clamp level must be implemented. Refer to Figures 23 and 25.
VPin 5
RSIpkrDS(on)
rDM(on)
RS
If: SENSEFET = MTP10N10M
R
S
= 200
Then : VPin5
0.075Ipk
(12)
Figure 26. Current Sensing Power MOSFET
+
-
5.0V Ref
+
-
S
R
Q
7(11)
6(10)
5(8)
3(5)
R
S
Q1
V
CC
V
in
C
R
The addition of the RC filter will eliminate instability caused by the leading
edge spike on the current waveform.
7(12)
Comp/Latch
Figure 27. Current Waveform Spike Suppression
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