參數(shù)資料
型號: UC3842BVD1R2
英文描述: I2C BUS-CONTROLLED MULTISTANDARD SINGLE CHIP TV PROCESSOR
中文描述: 模擬IC
文件頁數(shù): 13/20頁
文件大小: 296K
代理商: UC3842BVD1R2
UC3842B, UC3843B, UC2842B, UC2843B, NCV3843BV
http://onsemi.com
13
Figure 28. MOSFET Parasitic Oscillations
6(10)
5(8)
3(5)
R
S
Q1
V
in
C1
Base Charge
Removal
The totem pole output can furnish negative base current for enhanced
transistor turn-off, with the addition of capacitor C
1
.
S
R
5.0V Ref
Q
7(11)
6(10)
5(8)
3(5)
R
S
Q1
V
CC
I
B
+
-
0
V
in
Isolation
Boundary
V
GS
Waveforms
+
-
0
+
-
0
50% DC
25% DC
Ipk
V(Pin1)
1.4
3RS
NS
Np
Comp/Latch
7(12)
R
C
N
S
N
P
+
-
+
-
Bias
+
Osc
R
R
R
2R
EA
5(9)
1(1)
2(3)
4(7)
8(14)
The MCR101 SCR must be selected for a holding of < 0.5 mA @ T
. The simple two
transistor circuit can be used in place of the SCR as shown. All resistors are 10 k.
MCR
101
2N
3905
2N
3903
1.0 mA
S
R
5.0V Ref
Q
7(11)
6(10)
5(8)
3(5)
R
S
Q1
V
CC
V
in
Series gate resistor R
will damp any high frequency parasitic oscillations
caused by the MOSFET input capacitance and any series wiring inductance in
the gate-source circuit.
7(12)
R
g
Comp/Latch
+
-
+
-
Figure 29. Bipolar Transistor Drive
Figure 30. Isolated MOSFET Drive
Figure 31. Latched Shutdown
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