參數(shù)資料
型號(hào): UC1682
廠商: Electronic Theatre Controls, Inc.
英文描述: HIGH-VOLTAGE MIXED-SIGNAL IC
中文描述: 高電壓混合信號(hào)集成電路
文件頁(yè)數(shù): 39/70頁(yè)
文件大?。?/td> 1161K
代理商: UC1682
UC1682
80x104RGB CSTN Controller-Driver
Revision 0.6
37
S8
UC
(3/4-
WIRE
) I
NTERFACE
Only write operations are supported in this 3/4-wire
serial mode. The data format is identical to S8.
However, in addition to CS pins, CD pin transitions
will also reset the bus cycle in this mode. So, if CS
pins are hardwired to enable chip-select, the bus
can work properly with only three signal pins.
S9 (3-
WIRE
) I
NTERFACE
Only write operations are supported in this 3-wire
serial mode. Pin CS[1-0] are used for chip select
and bus cycle reset. On each write cycle, the first
CS0
bit is CD, which determines the content of the
following 8 bits of data, MSB first. These 8
command or data bits are latched on rising SCK
edges into an 8-bit data holder. If CD=0, the data
byte will be decoded as command. If CD=1, this 8-
bit will be treated as data and transferred to proper
address in the Display Data RAM at the rising edge
of the last SCK pulse.
By sending CD information explicitly in the bit
stream, control pin CD is not used, and should be
connected to either V
DD
or V
SS
. The toggle of CS0
or CS1 for each byte of data/command is
recommended but optional.
SDA
SCK
CD
D7
D6
D5
D4
D3
D2
D1
D0
CD
D7
D6
F
IGURE
7.c:
3-wire Serial Interface (S9)
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