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參數(shù)資料
| 型號： | UC1682 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | HIGH-VOLTAGE MIXED-SIGNAL IC |
| 中文描述： | 高電壓混合信號集成電路 |
| 文件頁數(shù)： | 27/70頁 |
| 文件大?。?/td> | 1161K |
| 代理商： | UC1682 |
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UC1682
80x104RGB CSTN Controller-Driver
Revision 0.6
25
(33) S
ET
W
INDOW
P
ROGRAM
S
TARTING
R
OW
A
DDRESS
Action
C/D W/R D7
0
0
D6
1
D5
1
D4
1
D3
0
D2
1
D1 D0
0
1
1
Set WPP0
(Double byte command)
WPP0
register parameter
This command is to program the starting row address of RAM program window.
(34) S
ET
W
INDOW
P
ROGRAM
E
NDING
C
OLUMN
A
DDRESS
Action
C/D W/R D7
0
0
D6
1
WPC1[7:0]
register parameter
D5
1
D4
1
D3
0
D2
1
D1 D0
1
1
0
Set WPC1
(Double byte command)
This command is to program the ending column address of RAM program window.
(35) S
ET
W
INDOW
P
ROGRAM
E
NDING
R
OW
A
DDRESS
Action
C/D W/R D7
0
0
D6
1
D5
1
D4
1
D3
0
D2
1
D1 D0
1
1
1
Set WPP1
(Double byte command)
WPP1
register parameter
This command is to program the ending row address of RAM program window.
(36) S
ET
W
INDOW
P
ROGRAM
E
NABLE
Action
C/D W/R D7
0
0
D6
1
D5
1
D4
1
D3
1
D2
0
D1 D0
0
AC4
Set Window Program Enable AC[4]
1
This command is to enable the Window Program Function. Window Program Enable should always be reset
when changing the window program boundary and then set right before starting the new boundary program.
Window Program Function can be used to refresh the RAM data in a specified window of SRAM address.
When window programming is enabled, the CA and RA increment and wrap around will be automatically
adjusted, and therefore allow effective data update within the window.
The direction of Window Program will depend on the WA (AC[0]), RID (AC[2]), auto-increment order (AC[1])
and MX (LC[1]) register setting. WA decides whether the program RAM address advances to next
row/column after reaching the specified window column / row boundary. RID controls the RAM address
incrementing from WPP0 toward WPP1 (RID=0) or reverse the direction (RID=1). Auto-increment order
directs the RAM address increment vertically (AC[1]=1) or horizontally (AC[1]=0). MX results the RAM
column address incrementing from 103-WPC0 to 103-WPC1 (MX=1) or WPC0 to WPC1 (MX=0).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UC1682TFBZ | HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1682THCZ | HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1682XFBZ | HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1682XHCZ | HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1834LQMLV | High Efficiency Linear Regulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UC1682TFBZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1682THCZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1682THDG | 制造商:Tianma Micro-electronics Co 功能描述:IC FOR TM9664FKFWG-11 - Bulk |
| UC1682XFBZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HIGH-VOLTAGE MIXED-SIGNAL IC |
| UC1682XHCZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HIGH-VOLTAGE MIXED-SIGNAL IC |
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