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參數(shù)資料
| 型號： | UC1608 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128COM x 240SEG Matrix LCD Controller-Driver |
| 中文描述： | 128COM x 240SEG矩陣LCD控制器驅(qū)動器 |
| 文件頁數(shù)： | 25/42頁 |
| 文件大?。?/td> | 996K |
| 代理商： | UC1608 |
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U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
1999-2002
22
Revision 0.52
MX I
MPLEMENTATION
Column Mirroring (MX) is implemented by selecting
either (CA) or (239–CA) as the RAM column
address. Changing MX affects the data written to
the RAM.
Since MX has no effect on data already stored in
RAM, changing MX does not have immediate effect
on the displayed pattern. To refresh the display,
refresh the data stored in RAM after setting MX.
D
ISPLAY
S
CANNING
During each field of display, depending on the
setting of MR, COM electrodes will be scanned in a
fixed pattern at a rate of
(Frame Rate x Mux Rate) rows/second
.
During each row period, the signal at the SEG
drivers determines the ON/OFF status of the row of
pixels being scanned.
R
OW
S
CANNING
For each field, the scanning starts at COM1
through COMx, where x depends on the setting of
MR.
COM electrode scanning (row scanning) orders are
not affected by Start Line (SL) or Mirror Y (MY,
LC[3]). When MY is 0, the effect of SL having a
value
K
is to change the mapping of COM1 to the
K
-th bit slice of data stored in display RAM. Visually,
SL having a non-zero value is equivalent to
scrolling LCD display up by SL rows.
RAM A
DDRESS
G
ENERATION
The mapping of the data stored in the display
SRAM and the scanning electrodes can be
obtained by combining the fixed Row scanning
sequence and the following RAM address
generation formula.
During the display operation, the RAM line address
generation can be mathematically represented as
following:
For the 1
st
line period of each field
Line = SL
Otherwise
Line =
Mod(
Line
+1,
128
)
Where Mod
is the modular operator, and
Line
is the
bit slice line address of RAM to be outputted to
SEG drivers. Line 0 corresponds to the first bit-slice
of data in RAM.
The above
Line
generation formula produces the
“l(fā)oop around” effect as it effectively resets
Line
to 0
when
Line+1
reaches
128
.
Effects such as page scrolling can be emulated by
changing SL dynamically.
MY I
MPLEMENTATION
Row Mirroring (MY) is implemented by reversing
the mapping order between COM electrodes and
RAM, i.e. the mathematical address generation
formula becomes:
For the 1
st
line period of each field
Line =
Mod(
SL + MUX-1
,
128
)
where MUX = 96 or 128.
Otherwise
Line =
Mod(
Line-1
,
128
)
Visually, the effect of MY is equivalent to flipping
the display upside down. The data stored in display
RAM is not affected by MY.
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