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參數(shù)資料
| 型號： | UC1608 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128COM x 240SEG Matrix LCD Controller-Driver |
| 中文描述： | 128COM x 240SEG矩陣LCD控制器驅(qū)動器 |
| 文件頁數(shù)： | 20/42頁 |
| 文件大小： | 996K |
| 代理商： | UC1608 |
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UC1608
128x240 Matrix LCD Controller-Drivers
(Revision 0.52 Preview)
17
LCD D
ISPLAY
C
ONTROLS
C
LOCK
& T
IMING
G
ENERATOR
UC1608 contains a built-in system clock. All
required components for the clock oscillator are
built-in. No external parts are required.
D
RIVER
M
ODES
COM and SEG drivers can be in either Idle mode
or Active mode, controlled by Display Enable flag
(DC[2]). When COM drivers are in idle mode, their
outputs are high-impedance (open circuit). When
SEG drivers are in idle mode, their outputs are
connected to V
SS
.
D
RIVER
A
RRANGEMENTS
The naming conventions are: COM(x), where
x=1~128, refers to the COM driver for the x-th row
of pixels on the LCD panel.
The mapping of COM(x) to LCD pixel rows is the
same for all MR, MX and MY settings. When MR is
not 128, then COM(x) ~ COM128 (X = MR+1)
should be left open circuit.
D
ISPLAY
C
ONTROLS
There are three groups of display control flags in
the control register DC: Driver Enable (DE), All-
Pixel-ON (APO) and Inverse (PXV). DE has the
overriding effect over PXV and APO.
D
RIVER
E
NABLE
(DE)
Driver Enable is controlled by the value of DC[2].
When DE is set to OFF (logic “0”), both SEG and
COM drivers will become idle and UC1608 will put
itself into Sleep mode to conserve power.
When DE is set to ON, UC1608 will first exit from
Sleep mode, restore the power (V
LCD
, V
BIAS
etc.)
and then turn on COM and SEG drivers.
A
LL
P
IXELS
O
N
(APO)
When set, this flag will force all active SEG drivers
to output On signals, disregarding the data stored
in the display buffer.
This flag has no effect when Display Enable is OFF
and it has no effect on data stored in RAM.
I
NVERSE
(PXV)
When this flag is set to ON, active SEG drivers will
output the inverse of the value it received from the
display buffer RAM (bit-wise inversion). This flag
has no impact on data stored in RAM.
S
CROLLING
SL register can be used to implement scroll
function. Setting SL to a non-zero value
N
will
result in the image being scrolled by
N
lines.
ITO L
AYOUT
C
ONSIDERATIONS FOR
COM
SIGNALS
Since UC1608 line rate is as fast as 10KHz and the
common scanning pulse is only 100us wide, it is
critical to minimize the RC delay experienced by
common electrodes.
It is recommended to optimize the ITO layout to
limit the worst case common electrode RC delay as
calculated below:
(R
ROW
/3
+ R
COM
+ R
OUT
) x C
ROW
< 2uS
where
C
ROW
: LCD loading capacitance of one row
of pixels.
R
ROW
:
ITO resistance over one row of
pixels within the active area
R
COM
:
ITO resistance leading from COF
OLD to the active area
R
OUT
:
UC1608 output, 1.5K Ohm typical
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