參數(shù)資料
型號(hào)： UC1606XGAF
廠商： Electronic Theatre Controls, Inc.
英文描述： 65COM x 132SEG Matrix LCD Controller-Driver
中文描述： 65COM x 132SEG矩陣LCD控制器驅(qū)動(dòng)器
文件頁(yè)數(shù)： 26/46頁(yè)
文件大?。?/td> 895K
代理商： UC1606XGAF
U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
1999-2003
24
Product Specifications
D
ISPLAY
D
ATA
RAM
D
ATA
O
RGANIZATION
The display data is 1-bit per pixel and stored in a
dual port static RAM (RAM, for Display Data RAM).
The RAM size is 65 x 132 for UC1606. This array
of data bits is further organized into pages of 8 bit
slices to facilitate parallel bus interface.
When Mirror X (MX, LC[2]) is OFF, the 1
st
column
of LCD pixels will correspond to the bits of the first
byte of each page, the 2
column of LCD pixels
correspond to the bits of the second byte of each
page, etc.
MSB F
IRST OR
LSB F
IRST
There are two options to map D[7:0] to RAM, MSB
first (MSF=1), or LSB first (MSF=0), as illustrated in
next page.
D
ISPLAY
D
ATA
RAM
A
CCESS
The memory used in UC1606 Display Data RAM
(RAM) is a special purpose dual port RAM which
allows asynchronous access to both its column and
row data. Thus, RAM can be independently
accessed both for Host Interface and for display
operations.
D
ISPLAY
D
ATA
RAM A
DDRESSING
A Host Interface (HI) memory access operation
starts with specifying Page Address (PA) and
Column Address (CA) by issuing
Set Page Address
and
Set Column Address
commands.
If wrap-around (WA, AC[0]) is OFF (0), CA will stop
increasing after reaching the end of page , and
system programmers need to set the values of PA
and CA explicitly.
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